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LTC3785 Datasheet, PDF (6/20 Pages) Linear Technology – 10V, High Effi ciency, Synchronous, No RSENSE Buck-Boost Controller
LTC3785
PI FU CTIO S
MODE (Pin 8): Burst Mode Control Pin.
• MODE = High: Enable Burst Mode Operation. In Burst
Mode operation the operation is variable frequency,
which provides a significant efficiency improvement
at light loads. The Burst Mode operation will continue
until the pin is driven low.
• MODE = Low: Disable Burst Mode operation and maintain
low noise, constant frequency operation.
NC (Pin 9): No Connect. There is no electrical connection
to this pin inside the package.
ISVOUT (Pin 10): Reverse Current Limit Comparator Non-
inverting Input. This pin is normally connected to the drain
of the N-channel MOSFET D (TG2 driven).
VBST2 (Pin 11): Boosted Floating Driver Supply for Boost
Switch D. This pin will swing from a diode below VCC up
to VOUT + VCC – VDIODE.
SW2 (Pin 13): Ground Reference for Driver D. Gate drive
from TG2 will reference to the common point of output
switches C and D.
ISSW2 (Pin 14): Reverse Current Limit Comparator Invert-
ing Input. This pin is normally connected to the source of
the N-channel MOSFET D (TG2 driven).
VDRV (Pin 16): Driver Supply for Ground Referenced
Switches. Connect this pin to VCC potential.
BG1, BG2 (Pins 17, 15): Bottom gate driver pins drive
the ground referenced N-channel MOSFET switches B
and C.
ISSW1 (Pin 18): Forward Current Limit Comparator Non-
inverting Input. This pin is normally connected to the
source of the N-channel MOSFET A (TG1 driven).
SW1 (Pin 19): Ground Reference for Driver A. Gate drive
from TG1 will reference to the common point of output
switches A and B.
TG1, TG2 (Pins 20, 12): Top gate drive pins drive the
top N-channel MOSFET switches A and D with a voltage
swing equal to VCC – VDIODE superimposed on the SW1
and SW2 nodes respectively.
VBST1 (Pin 21): Boosted Floating Driver Supply for the
Buck Switch A. This pin will swing from a diode below
VCC up to VIN + VCC – VDIODE.
ISVIN (Pin 22): Forward Current Limit Comparator Invert-
ing Input. This pin is normally connected to the drain of
N-channel MOSFET A (TG1 driven).
VCC (Pin 23): Internal 4.5V LDO Regulator Output. The
driver and control circuits are powered from this voltage
to limit the maximum VGS drive voltage. Decouple this pin
to power ground with at least a 4.7µF ceramic capacitor.
For low VIN applications, VCC can be bootstrapped from
VOUT through a Schottky diode.
VIN (Pin 24): Input Supply Pin for the VCC Regulator. A
ceramic capacitor of at least 10µF is recommended close
to the VIN and GND pins.
Exposed Pad (Pin 25): The GND and PGND pins are con-
nected to the Exposed Pad which must be connected to
the PCB ground for electrical contact and rated thermal
performance.
3785f
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