LTC3785 Datasheet, PDF (17/20 Pages) Linear Technology – 10V, High Effi ciency, Synchronous, No RSENSE Buck-Boost Controller

LTC3785
APPLICATIO S I FOR ATIO
• Segregate the signal and power grounds. All small-signal
components should return to the GND pin at one point.
The sources of switch B and switch C should also con-
nect to one point at the GND of the IC.
• Place switch B and switch C as close to the controller
as possible, keeping the PGND, BG and SW traces
short.
• Keep the high dV/dT SW1, SW2, V_BST1, V_BST2, TG1 and
TG2 nodes away from sensitive small-signal nodes.
• The path formed by switch A, switch B, D1 and the C_IN
capacitor should have short leads and PC trace lengths.
The path formed by switch C, switch D, D2 and the
C_OUT capacitor also should have short leads and PC
trace lengths.
• The output capacitor (–) terminals should be connected
as close as possible to the (–) terminals of the input
capacitor.
• Connect the V_CC decoupling capacitor C_VCC closely to
the V_CC and PGND pins.
• Connect the top driver boost capacitor C_A closely to
the V_BST1 and SW1 pins. Connect the top driver boost
capacitor C_B closely to the V_BST2 and SW2 pins.
• Connect the input capacitors C_IN and output capaci-
tors C_OUT close to the power MOSFETs. These capaci-
tors carry the MOSFET AC current in boost and buck
mode.
• Connect FB and V_SENSE pin resistive dividers to the (+)
terminals of C_OUT and signal ground. If a small V_SENSE
decoupling capacitor is used, it should be as close as
possible to the LTC3785 GND pin.
• Route I_SVIN and I_SSW1 leads together with minimum PC
trace spacing. Ensure accurate current sensing with Kel-
vin connections across MOSFET A or sense resistor.
• Route I_SVOUT and I_SSW2 leads together with minimum
PC trace spacing. Ensure accurate current sensing
with Kelvin connections across MOSFET D or sense
resistor.
• Connect the feedback network close to IC, between the
V_C and FB pins.
3785f
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