LTC3221_15 Datasheet, PDF (6/12 Pages) Linear Technology – Micropower, Regulated Charge Pump

LTC3221/
LTC3221-3.3/LTC3221-5
PI FU CTIO S
C+ (Pin 1): Flying Capacitor Positive Terminal.
C– (Pin 2): Flying Capacitor Negative Terminal.
⎯SH⎯ D⎯ N⎯ (Pin 3) (LTC3221-3.3/LTC3221-5): Active Low
Shutdown Input. A low on S^⎯ H^⎯ D^⎯ N^⎯ disables the LTC3221-3.3/
LTC3221-5. S^⎯ H^⎯ D^⎯ N^⎯ must not be allowed to float.
FB (Pin 3) (LTC3221): Feedback. The voltage on this pin
is compared to the internal reference voltage (1.23V) by
the error comparator to keep the output in regulation. An
external resistor divider is required between V_OUT and FB
to program the output voltage.
GND (Pin 4): Ground. Should be tied to a ground plane
for best performance.
V_IN (Pin 5): Input Supply Voltage. V_IN should be bypassed
with a 2.2µF low ESR capacitor.
V_OUT (Pin 6): Regulated Output Voltage. For best perfor-
mance, V_OUT should be bypassed with a 2.2µF or higher
low ESR capacitor as close as possible to the pin.
Exposed Pad (Pin 7) Ground. The exposed pad must be
soldered to PCB ground to provide electrical contact and
optimum thermal performance.
BLOCK DIAGRA
V_OUT 6
SHDN 3
LTC3221-3.3/LTC3221-5
CMP
+
–
V_REF
CONTROL
2
1
2
1
V_OUT 6
1 C⁺
I_SW
5 V_IN
FB 3
2 C^–
4 GND
CMP
+
–
V_REF
LTC3221
CONTROL
2
1
2
1
1 C⁺
I_SW
5 V_IN
2 C^–
4 GND
3221 BD
U
OPERATIO (Refer to Block Diagrams)
The LTC3221 family uses a switched capacitor charge pump
to boost V_IN to a regulated output voltage. Regulation is
achieved by monitoring the output voltage, V_OUT using a
comparator (CMP in the Block Diagram) and keeping it
within a hysteresis window. If V_OUT drops below the lower
trip point of CMP, V_OUT is charged by the controlled cur-
rent, I_SW in series with the flying capacitor C_FLY. Once V_OUT
goes above the upper trip point of CMP, or if the upper
trip point is not reached after 0.8µs, C_FLY is disconnected
from V_OUT. The bottom plate of C_FLY is then connected
to GND to allow I_SW to replenish the charge on C_FLY for
0.8µs. After which, I_SW is turned off to keep the operating
supply current low. CMP continues to monitor V_OUT and
turns on I_SW if the lower threshold is reached again.
6
Shutdown Mode
The ^⎯S^⎯H^⎯D^⎯N pin is a CMOS input with a threshold voltage
of approximately 0.8V. The LTC3221-3.3/ LTC3221-5 are
in shutdown when a logic low is applied to the ⎯S⎯H⎯D⎯N
pin. In shutdown mode, all circuitry is turned off and the
LTC3221-3.3/ LTC3221-5 draw only leakage current from
the V_IN supply. Furthermore, V_OUT is disconnected from
V_IN. Since the ⎯S⎯H⎯D⎯N pin is a very high impedance CMOS
input, it should never be allowed to float.
When ⎯S⎯H⎯D⎯N is asserted low, the charge pump is first dis-
abled, but the LTC3221-3.3/LTC3221-5 continue to draw
5µA of supply current. This current will drop to zero when
the output voltage (V_OUT) is fully discharged to 0V.
3221f