LTC3576-1_15 Datasheet, PDF (40/48 Pages) Linear Technology – Switching Power Manager with USB On-the-Go Triple Step-Down DC/DCs

LTC3576/LTC3576-1
APPLICATIONS INFORMATION
LTC3576/
LTC3576-1
ENOTG
ON-THE-GO
TRANSCEIVER
OVSENS
OVGATE
OVP
(OPTIONAL)
V_BUS
C_A
<6.5μF
WITHOUT OVP
D^–
D⁺
C_B
<6.5μF
ON-THE-GO
POWER
MANAGER
ON-THE-GO
TRANSCEIVER
A DEVICE
B DEVICE ^{3576 F11}
Figure 11. LTC3576/LTC3576-1 as the A Device
LTC3576/
LTC3576-1
ENOTG
ON-THE-GO
TRANSCEIVER
OVSENS
OVGATE
OVP
(OPTIONAL)
V_BUS
C_B
<6.5μF
WITHOUT OVP
C_A
<6.5μF FOR OTG DEVICES
>96μF FOR STANDARD HOST
D^–
D⁺
STANDARD
USB HOST OR
ON-THE-GO
POWER
MANAGER
STANDARD OR
ON-THE-GO
TRANSCEIVER
B DEVICE
A DEVICE ^{3576 F12}
Figure 12. LTC3576/LTC3576-1 as the B Device
down on-the-go A device and a powered down standard
host. A suitable pulse can be generated because of the
disparity in the bypass capacitances of an on-the-go A
device and a standard host even if there is somewhat
more than 6.5μF capacitance connected to the V_BUS pin
of the LTC3576/LTC3576-1.
Board Layout Considerations
The Exposed Pad on the backside of the LTC3576/
LTC3576-1 package must be securely soldered to the PC
board ground. This is the primary ground pin in the pack-
age, and it serves as the return path for both the control
circuitry and the N-channel MOSFET switches.
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitor, inductor, and
output capacitor be as close to the LTC3576/LTC3576-1
as possible and that there be an unbroken ground plane
under the LTC3576/LTC3576-1 and all of their external
40
high frequency components. High frequency currents,
such as the V_BUS, V_IN1, V_IN2 and V_IN3 currents tend to find
their way on the ground plane along a mirror path directly
beneath the incident path on the top of the board. If there
are slits or cuts in the ground plane due to other traces
on that layer, the current will be forced to go around the
slits. If high frequency currents are not allowed to flow
back through their natural least-area path, excessive
voltage will build up and radiated emissions will occur
(see Figure 13). There should be a group of vias directly
under the grounded backside leading directly down to an
internal ground plane. To minimize parasitic inductance,
the ground plane should be as close as possible to the
top plane of the PC board (layer 2).
The IDGATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an additional offset to
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