English
Language : 

LTC3783 Datasheet, PDF (4/24 Pages) Linear Technology – PWM LED Driver and Boost, Flyback and SEPIC Controller
LTC3783
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TJ = 25°C.
VIN = 12V, VRUN = 1.5V, VSYNC = 0V, VFBP = VREF, RT = 20k, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX
Low Dropout Regulator
VINTVCC
UVLO
INTVCC Regulator Output Voltage
INTVCC Undervoltage Lockout
Thresholds
VOV/FB = 1.5V
Rising INTVCC
Falling INTVCC
Hysteresis
● 6.5
1.8
7 7.5
2.3 2.5
2.1
0.2
∆VINTVCC
∆VIN
∆VLDO(LOAD)
VDROPOUT
IINTVCC(SD)
INTVCC Line Regulation
INTVCC Load Regulation
INTVCC Dropout Voltage
Bootstrap Mode INTVCC Supply
Current in Shutdown
GATE/PWMOUT Drivers
12V ≤ VIN ≤ 36V
0 ≤ IINTVCC ≤ 10mA
VIN = 7V, IINTVCC = 10mA
VSENSE = 0V
VSENSE = 7V
2
6
–1
– 0.1
300 500
25
15
tr(GATE)
GATE Driver Output Rise Time
CL = 3300pF (Note 7)
15
tf(GATE)
GATE Driver Output Fall Time
CL = 3300pF (Note 7)
8
IPK(GATE,RISE) GATE Driver Peak Current Sourcing
VGATE = 0V
0.5
IPK(GATE,FALL) GATE Driver Peak Current Sinking
VGATE = 7V
1
VPWMIN
PWMIN Pin Input Threshold Voltages Rising PWMIN
1.6
Falling PWMIN
0.8
Hysteresis
0.8
RPWMIN
PWMIN Input Pull-Up Resistance
100
tr(PWMOUT)
PWMOUT Driver Output Rise Time
CL = 3300pF (Note 7)
30
tf(PWMOUT)
PWMOUT Driver Output Fall Time
CL = 3300pF (Note 7)
16
IPK(PWMOUT,RISE) PWMOUT Driver Peak Current Sourcing VPWMOUT = 0V
0.25
IPK(PWMOUT,FALL) PWMOUT Driver Peak Current Sinking VPWMOUT = 7V
0.50
UNITS
V
V
V
V
mV/V
%
mV
µA
µA
ns
ns
A
A
V
V
V
kΩ
ns
ns
A
A
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LTC3783E is guaranteed to meet performance specifications
from 0°C to 85°C junction temperature. Specifications over the – 40°C to
85°C operating temperature range are assured by design, characterization
and correlation with statistical process controls.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • 43°C/W) for the DFN
TJ = TA + (PD • 38°C/W) for the TSSOP
Note 4: The dynamic input supply current is higher due to power MOSFET
gate charging (QG • fOSC). See Operation section.
Note 5: The LTC3783 is tested in a feedback loop which servos VFBN to
VFBP = VVREF with the ITH pin forced to the midpoint of its voltage range
(0.3V ≤ VITH ≤ 1.2V; midpoint = 0.75V).
Note 6: In a synchronized application, the internal slope compensation is
increased by 25%. Synchronizing to a significantly higher ratio will reduce
the effective amount of slope compensation, which could result in sub-
harmonic oscillation for duty cycles greater than 50%
Note 7: Rise and fall times are measured at 10% and 90% levels.
3783f
4