LTC3783 Datasheet, PDF (17/24 Pages) Linear Technology – PWM LED Driver and Boost, Flyback and SEPIC Controller

U
OPERATIO
Boost Converter: Output Diode Selection
To maximize efficiency, a fast switching diode with low
forward drop and low reverse leakage is desired. The
output diode in a boost converter conducts current during
the switch off-time. The peak reverse voltage that the
diode must withstand is equal to the regulator output
voltage. The average forward current in normal operation
is equal to the output current, and the peak current is equal
to the peak inductor current.
I_D(PEAK)
=
I_L(PEAK)
=
⎛⎝⎜₁₊
χ⎞
2 ⎠⎟
•
I_OUT(MAX)
1– D_MAX
The power dissipated by the diode is:
P_D = I_OUT(MAX) • V_D
and the diode junction temperature is:
T_J = T_A + P_D • θ_JA
The θ_JA to be used in this equation normally includes the
θ_JC for the device plus the thermal resistance from the
board to the ambient temperature in the enclosure.
Remember to keep the diode lead lengths short and to
observe proper switch-node layout (see Board Layout
Checklist) to avoid excessive ringing and increased
dissipation.
Boost Converter: Output Capacitor Selection
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
must be considered when choosing the correct compo-
nent for a given output ripple voltage. The effects of these
three parameters (ESR, ESL and bulk C) on the output
voltage ripple waveform are illustrated in Figure 9 for a
typical boost converter.
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
between the ESR step and the charging/discharging ∆V.
For the purpose of simplicity we will choose 2% for the
maximum output ripple, to be divided equally between the
LTC3783
V_OUT
(AC)
∆V_ESR
∆V_COUT
3783 F09
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
Figure 9. Output Ripple Voltage
ESR step and the charging/discharging ∆V. This percent-
age ripple will change, depending on the requirements of
the application, and the equations provided below can
easily be modified.
For a 1% contribution to the total ripple voltage, the ESR
of the output capacitor can be determined using the
following equation:
ESR_COUT
<
0.01•
V_OUT
I_IN(PEAK)
where :
I_IN(PEAK)
=
⎛⎝⎜₁₊
χ⎞
2 ⎠⎟
•
I_OUT(MAX)
1– D_MAX
For the bulk C component, which also contributes 1% to
the total ripple:
C_OUT
>
I_OUT(MAX)
0.01• V_OUT •
f
For many designs it is possible to choose a single capaci-
tor type that satisfies both the ESR and bulk C require-
ments for the design. In certain demanding applications,
however, the ripple voltage can be improved significantly
by connecting two or more types of capacitors in parallel.
For example, using a low ESR ceramic capacitor can
minimize the ESR setup, while an electrolytic capacitor
can be used to supply the required bulk C.
Once the output capacitor ESR and bulk capacitance have
been determined, the overall ripple voltage waveform
should be verified on a dedicated PC board (see Board
3783f
17