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LTC3839 Datasheet, PDF (3/50 Pages) Linear Technology – Fast, Accurate, 2-Phase, Single-Output Step-Down DC/DC Controller
LTC3839
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted (Note 3).
SYMBOL
PARAMETER
IVOUTSENSE+
IVOUTSENSE–
VOUTSENSE+ Input Bias Current
VOUTSENSE– Input Bias Current
gm(EA)
Error Amplifier Transconductance
tON(MIN)1,2
Minimum Top Gate On-Time
tOFF(MIN)1,2 Minimum Top Gate Off-Time
Current Sensing
VSENSE(MAX)1,2
Maximum Valley Current Sense Threshold
(VSENSE1,2+ – VSENSE1,2–)
VSENSE(MIN)1,2
ISENSE1,2+
Minimum Valley Current Sense Threshold
(VSENSE1,2+ – VSENSE1,2–)
(Forced Continuous Mode)
SENSE1,2+ Pins Input Bias Current
ISENSE1,2–
SENSE1,2– Pins Input Bias Current
(Internal 500k Resistor to SGND)
Start-Up and Shutdown
CONDITIONS
VOUTSENSE+ – VOUTSENSE– = 0.6V
VOUTSENSE+ – VOUTSENSE– = 0.6V
ITH = 1.2V (Note 5)
VIN = 38V, VOUT = 0.6V, RT = 20k (Note 6)
(Note 6)
VRNG
VRNG
=
=
2V,
0V,
VFB
VFB
=
=
0.57V,
0.57V,
VVSSEENNSSEE––
=
=
2.5V
2.5V
VRNG = INTVCC, VFB = 0.57V, VSENSE– = 2.5V
VRNG
VRNG
=
=
2V,
0V,
VFB
VFB
=
=
0.63V,
0.63V,
VVSSEENNSSEE––
=
=
2.5V
2.5V
VRNG = INTVCC, VFB = 0.63V, VSENSE– = 2.5V
VSENSE+ = 0.6V
VSENSE+ = 5V
VVSSEENNSSEE––
=
=
0.6V
5V
MIN TYP MAX UNITS
±5
±25
nA
–25 –50
μA
1.7
mS
30
ns
90
ns
l 80
100
120
mV
l 21
30
40
mV
l 39
50
61
mV
–50
mV
–15
mV
–25
mV
±5
±50
nA
1
±2
μA
1.2
μA
10
μA
VRUN
IRUN
UVLO
RUN Pin On Threshold
RUN Pin On Hysteresis
RUN Pin Pull-Up Current when Off
RUN Pin Pull-Up Current Hysteresis
INTVCC Undervoltage Lockout
ITRACK/SS
Soft-Start Pull-Up Current
Frequency and Clock Synchronization
VRUN Rising
VRUN Falling from On Threshold
RUN = SGND
(IRUN(ON) – IRUN(OFF))
INTVCC Falling
INTVCC Rising
0V < TRACK/SS < 0.6V
l 1.1
1.2
1.3
V
100
mV
2.5
μA
10
μA
l 3.3
3.7
V
l
4.2
4.5
V
1
μA
f
VPLLIN(H)
VPLLIN(L)
RMODE/PLLIN
Gate Drivers
Clock Output Frequency
(Steady-State Switching Frequency)
Channel 2 Phase (Relative to Channel 1)
CLKOUT Phase (Relative to Channel 1)
Clock Input High Level Into MODE/PLLIN
Clock Input Low Level Into MODE/PLLIN
MODE/PLLIN Input Resistance
RT = 205k
RT = 80.6k
RT = 18.2k
PHASMD = SGND
PHASMD = Floating
PHASMD = INTVCC
PHASMD = SGND
PHASMD = Floating
PHASMD = INTVCC
With Respect to SGND
200
kHz
450 500 550
kHz
2000
kHz
180
Deg
180
Deg
240
Deg
60
Deg
90
Deg
120
Deg
2
V
0.5
V
600
kΩ
RTG(UP)1,2
RTG(DOWN)1,2
RBG(UP)1,2
RBG(DOWN)1,2
tD(TG/BG)1,2
tD(BG/TG)1,2
TG Driver Pull-Up On Resistance
TG High
TG Driver Pull-Down On Resistance
TG Low
BG Driver Pull-Up On Resistance
BG High
BG Driver Pull-Down On Resistance
BG Low
Top Gate Off to Bottom Gate On Delay Time (Note 6)
Bottom Gate Off to Top Gate On Delay Time (Note 6)
2.5
Ω
1.2
Ω
2.5
Ω
0.8
Ω
20
ns
15
ns
3839fa
3