LTC3839 Datasheet, PDF (22/50 Pages) Linear Technology – Fast, Accurate, 2-Phase, Single-Output Step-Down DC/DC Controller

LTC3839
APPLICATIONS INFORMATION
To maintain a good signal-to-noise ratio for the current
sense signal, start with a ∆V_SENSE of 10mV. For a DCR
sensing application, the actual ripple voltage will be de-
termined by:
ΔV_SENSE
=
V_IN – V_OUT
R1• C1
•
V_OUT
V_IN • f
Power MOSFET Selection
Two external N-channel power MOSFETs must be selected
for each channel of the LTC3839 controller: one for the
top (main) switch and one for the bottom (synchronous)
switch. The gate drive levels are set by the DRV_CC voltage.
This voltage is typically 5.3V. Pay close attention to the
BV_DSS specification for the MOSFETs as well; most of the
logic-level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the on-
resistance, R_DS(ON), Miller capacitance, C_MILLER, input
voltage and maximum output current. Miller capacitance,
C_MILLER, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data sheet.
C_MILLER is equal to the increase in gate charge along the
horizontal axis while the curve is approximately flat (or
the parameter Q_GD if specified on a manufacturer’s data
sheet), divided by the specified V_DS test voltage:
C_MILLER
≅
Q_GD
V_{DS( TEST )}
When the IC is operating in continuous mode, the duty
cycles for the top and bottom MOSFETs are given by:
D_TOP
=
V_OUT
V_IN
D_BOT
=
1–
V_OUT
V_IN
The MOSFET power dissipations at maximum output
current are given by:
( ) P_TOP = D_TOP •I_OUT(MAX)2 •R_DS(ON)(MAX) 1+ δ + V_IN2
•
⎛
⎝⎜
I_{OUT(M AX )}
2
⎞
⎠⎟
•
C_MILLER
⎡
⎢
⎣
R_TG(UP)
V_DRVCC – V_MILLER
+
R_TG(DOWN)
V_MILLER
⎤
⎥
⎦
•
f
P_BOT = D_BOT • I_OUT(MAX)2 • R_DS(ON)(MAX) • (1 + δ )
22
where δ is the temperature dependency of R_DS(ON), R_TG(UP)
is the TG pull-up resistance, and R_TG(DOWN) is the TG pull-
down resistance. V_MILLER is the Miller effect V_GS voltage
and is taken graphically from the MOSFET’s data sheet.
Both MOSFETs have I²R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V_IN < 20V,
the high current efficiency generally improves with larger
MOSFETs, while for V_IN > 20V, the transition losses rapidly
increase to the point that the use of a higher R_DS(ON) device
with lower C_MILLER actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R_DS(ON) vs temperature curve in the
power MOSFET data sheet. For low voltage MOSFETs,
0.5% per degree (°C) can be used to estimate δ as an
approximation of percentage change of R_DS(ON):
δ = 0.005/°C • (T_J – T_A)
where T_J is estimated junction temperature of the MOSFET
and T_A is ambient temperature.
C_IN Selection
In continuous mode, the source current of the top N-
channel MOSFET is a square wave of duty cycle V_OUT/
V_IN. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The worst-case RMS current occurs by assuming
a single-phase application. The maximum RMS capacitor
current is given by:
I_RMS
≅ I_OUT(MAX)
•
V_OUT
V_IN
•
V_{IN – 1}
V_OUT
This formula has a maximum at V_IN = 2V_OUT, where
I_RMS = I_OUT(MAX)/2. This simple worst-case condition
is commonly used for design because even significant
deviations do not offer much relief. Note that capacitor
manufacturers’ ripple current ratings are often based on
only 2000 hours of life. This makes it advisable to further
derate the capacitor or to choose a capacitor rated at a
3839fa