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LTC3556 Datasheet, PDF (29/36 Pages) Linear Technology – High Effi ciency USB Power Manager with Dual Buck and Buck-Boost DC/DCs
LTC3556
APPLICATIONS INFORMATION
the LC double pole combined with the –90° of phase lag
from the right-half plane zero will result in negating the
phase bump of the compensator.
The compensator zeros should be placed either before
or only slightly after the LC double pole such that their
positive phase contributions offset the –180° that occurs
at the filter double pole. If they are placed at too low of a
frequency, they will introduce too much gain to the system
and the crossover frequency will be too high. The two high
frequency poles should be placed such that the system
crosses unity gain during the phase bump introduced
by the zeros and before the boost right-half plane zero
and such that the compensator bandwidth is less than
the bandwidth of the error amp (typically 900kHz). If the
gain of the compensation network is ever greater than
the gain of the error amplifier, then the error amplifier no
longer acts as an ideal op amp, and another pole will be
introduced at the same point.
Recommended Type III compensation components for a
3.3V output:
R1: 324kΩ
RFB: 105kΩ
C1: 10pF
R2: 15kΩ
C2: 330pF
R3: 121kΩ
C3: 33pF
COUT: 22μF
LOUT: 2.2μH
Over-Programming the Battery Charger
The USB high power specification allows for up to 2.5W to
be drawn from the USB port (5V × 500mA). The PowerPath
switching regulator transforms the voltage at VBUS to just
above the voltage at BAT with high efficiency, while limiting
power to less than the amount programmed at CLPROG.
In some cases the battery charger may be programmed
(with the PROG pin) to deliver the maximum safe charging
current without regard to the USB specifications. If there
is insufficient current available to charge the battery at the
programmed rate, the PowerPath regulator will reduce
charge current until the system load on VOUT is satisfied
and the VBUS current limit is satisfied. Programming the
battery charger for more current than is available will
not cause the average input current limit to be violated.
It will merely allow the battery charger to make use of
all available power to charge the battery as quickly as
possible, and with minimal power dissipation within the
battery charger.
Alternate NTC Thermistors and Biasing
The LTC3556 provides temperature qualified charging if
a grounded thermistor and a bias resistor are connected
to NTC. By using a bias resistor whose value is equal to
the room temperature resistance of the thermistor (R25)
the upper and lower temperatures are pre-programmed
to approximately 40°C and 0°C, respectively (assuming
a Vishay “Curve 1” thermistor).
The upper and lower temperature thresholds can be ad-
justed by either a modification of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modified but not both. The
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
adjustment resistor, both the upper and the lower tempera-
ture trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique follow.
NTC thermistors have temperature characteristics which
are indicated on resistance-temperature conversion tables.
The Vishay-Dale thermistor NTHS0603N011-N1003F, used
3556f
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