English
Language : 

LTC3556 Datasheet, PDF (22/36 Pages) Linear Technology – High Effi ciency USB Power Manager with Dual Buck and Buck-Boost DC/DCs
LTC3556
OPERATION
greater than 0.8V. A variety of capacitor sizes can be used
for CFB but a value of 10pF is recommended for most ap-
plications. Experimentation with capacitor sizes between
2pF and 22pF may yield improved transient response.
Buck Regulator Operating Modes
The LTC3556’s buck regulators include four possible op-
erating modes to meet the noise/power needs of a variety
of applications.
In pulse skip mode, an internal latch is set at the start of
every cycle which turns on the main P-channel MOSFET
switch. During each cycle, a current comparator compares
the peak inductor current to the output of an error amplifier.
The output of the current comparator resets the internal
latch which causes the main P-channel MOSFET switch to
turn off and the N-channel MOSFET synchronous rectifier
to turn on. The N-channel MOSFET synchronous rectifier
turns off at the end of the 2.25MHz cycle or if the current
through the N-channel MOSFET synchronous rectifier
drops to zero. Using this method of operation, the error
amplifier adjusts the peak inductor current to deliver the
required output power. All necessary compensation is
internal to the switching regulator requiring only a single
ceramic output capacitor for stability. At light loads in PWM
mode, the inductor current may reach zero on each pulse
which will turn off the N-channel MOSFET synchronous
rectifier. In this case, the switch node (SW) goes high
impedance and the switch node voltage will “ring.” This
is discontinuous mode operation and is normal behavior
for a switching regulator. At very light loads in pulse skip
mode, the buck regulators will automatically skip pulses
as needed to maintain output regulation.
At high duty cycles (VOUTx > VINx/2) it is possible for the
inductor current to reverse, causing the buck regulator
to operate continuously at light loads. This is normal and
regulation is maintained, but the supply current will increase
to several milliamperes due to continuous switching.
In forced Burst Mode operation, the buck regulators use a
constant-current algorithm to control the inductor current.
By controlling the inductor current directly and using a
hysteretic control loop, both noise and switching losses
are minimized. In this mode output power is limited. While
in forced Burst Mode operation, the output capacitor is
charged to a voltage slightly higher than the regulation
point. The step-down converter then goes into sleep mode,
during which the output capacitor provides the load cur
rent. In sleep mode, most of the regulator’s circuitry is
powered down, helping conserve battery power. When
the output voltage drops below a predetermined value, the
buck regulator circuitry is powered on and another burst
cycle begins. The duration for which the buck regulator
operates in sleep mode depends on the load current. The
sleep time decreases as the load current increases. The
maximum output current in forced Burst Mode operation
is about 100mA for buck regulators 1 and 2. The buck
regulators will not enter sleep mode if the maximum output
current is exceeded in forced Burst Mode operation and
the output will drop out of regulation. Forced Burst Mode
operation provides a significant improvement in efficiency
at light loads at the expense of higher output ripple when
compared to pulse skip mode. For many noise-sensitive
systems, forced Burst Mode operation might be undesirable
at certain times (i.e., during a transmit or receive cycle
of a wireless device), but highly desirable at others (i.e.,
when the device is in low power standby mode). The I2C
port can be used to enable or disable forced Burst Mode
operation at any time, offering both low noise and low
power operation when they are needed.
In Burst Mode operation, the buck regulator automati-
cally switches between fixed frequency PWM operation
and hysteretic control as a function of the load current.
At light loads, the buck regulators operate in hysteretic
mode in much the same way as described for the forced
Burst Mode operation. Burst Mode operation provides
slightly less output ripple at the expense of slightly lower
efficiency than forced Burst Mode operation. At heavy
loads, the buck regulator operates in the same manner
as pulse skip operation does at high loads. For applica-
tions that can tolerate some output ripple at low output
currents, Burst Mode operation provides better efficiency
than pulse skip at light loads while still providing the full
specified output current of the buck regulator.
Finally, the buck regulators have an LDO mode that gives
a DC option for regulating their output voltages. In LDO
mode, the buck regulators are converted to linear regula-
3556f
22