LTC1704EGN Datasheet, PDF (26/28 Pages) Linear Technology – 550kHz Synchronous Switching Regulator Controller Plus Linear Regulator Controller

LTC1704/LTC1704B
APPLICATIO S I FOR ATIO
reduces the available base current to minimize the I_LOAD •
V_CE product across the pass transistor. The amount of
current reduction depends on the REGFB pin voltage and
the R_REGILM resistance (refer to the Typical Performance
Characteristics Curves). This current limit foldback scheme
limits the NPN power dissipation and prevents it from
blowing up. However, in cases when there is a constant
current load at the regulator output, this current limit
foldback scheme can create a start-up problem. In spite of
this, most applications do not have full load requirement
during start-up. To fulfill majority applications require-
ments, the LTC1704 linear regulator allows a small amount
of base current when the linear regulator output is shorted
or V_REGFB = 0V. The actual regulator short-circuit current
can be calculated from the following equation:
I_SH
=
h_FE


4.8mA
+
V_REGON – 0.8
R_REGILM
•
300^{}
This short-circuit current should be checked against the
load requirement to allow proper start-up.
Linear Regulator Power Down
The linear regulator can be powered down easily. A pull-
down device (MOFF as shown in Figure 13) that is capable
of overcoming the REGILM pin 1.9µA weak pull-up current
can shut down the linear regulator. As shown in Figure 13,
if the resistor R_REGILM is smaller than 400k, forcing
V_REGON to ground can overcome the pull-up current and
power down the linear regulator. When both the REGILM
and RUN/SS pins are forced low, LTC1704 enters shut-
down mode and the quiescent current is reduced to 75µA.
Linear Regulator Turn-On Delay
The external capacitor C_DELAY from the REGILM pin to
ground allows the REGILM pin to ramp up slowly and adds
a delay to the turn-on time of the linear regulator. The
current through the resistor R_REGILM, the internal pull-up
current and the external capacitor C_DELAY controls the
REGILM pin slew rate. To power up the linear regulator,
the potential at the REGILM pin should not be below 0.8V.
To add power sequencing to the linear regulator is easy.
Once the current limit resistor R_REGILM is chosen, the
capacitor C_DELAY can be added to program the turn on
delay using the following equation:
t_DELAY
=
0.8 • C_DELAY
V_REGON – 0.8 _{+ 1.9µA}
R_REGILM
The actual turn-on delay, which includes the time for the
external NPN to charge the output capacitor, will be longer
than the calculated value.
The LTC1704 linear regulator turn-on delay circuit is
versatile; C_DELAY capacitance should be larger than 100pF
to allow instantaneous power up to seconds long delay.
Linear Regulator Output Bypass Capacitor
The linear regulator requires the use of an output capacitor
as part of the frequency compensation network. A mini-
mum output capacitor of 10µF with an ESR lower than
100mΩ is recommended to prevent oscillations. Larger
values of output capacitance with low ESR should be used
to provide improved transient response for large load
current changes.
Many different types of capacitors are available and have
widely varying characteristics. These capacitors differ in
capacitor tolerance (sometimes ranging up to ±100%),
equivalent series resistance, equivalent series inductance
and capacitance temperature coefficient. Low ESR tanta-
lum capacitors are recommended for this linear regulator.
1704bfa
26