LTC3802_15 Datasheet, PDF (23/28 Pages) Linear Technology – Dual 550kHz Synchronous 2-Phase DC/DC Controller with Programmable Up/Down Tracking

LTC3802
APPLICATIO S I FOR ATIO
C_MILLER = Calulated Miller capacitance using the gate
charge curve from the MOSFET data sheet
f_SW = Switching frequency
Both MOSFETs have conduction losses (I²R) while the
topside N-channel equation includes an additional term
for transition losses, which peak at the highest input
voltage. For V_IN < 12V, the high current efficiency gener-
ally improves with larger MOSFETs, while for V_IN > 12V,
the transition losses rapidly increase to the point that the
use of a higher R_DS(ON) device with lower C_MILLER actually
provides higher efficiency. The bottom MOSFET losses
are greatest at high input voltage when the top switch duty
factor is low or during a short circuit when the bottom
switch is on close to 100% of the period.
Schottky Diode D1/D2 Selection
The Schottky diode D1 shown in Figure 7 conducts during
the dead time between the conduction of the power
MOSFET switches. It is intended to prevent the body diode
of the bottom MOSFET from turning on and storing a
charge during the dead time, which can cause a modest
(about 1%) efficiency loss. The diode can be rated for
about one half to one fifth of the full load current since it
is on for only a fraction of the duty cycle. In order for the
diode to be effective, the inductance between it and the
bottom MOSFET must be as small as possible, mandating
that these components be placed adjacently.
C_IN Selection
The input bypass capacitor in an LTC3802 circuit is
common to both channels. The input bypass capacitor
gets exercised in three ways: its ESR must be low enough
to keep the supply drop low as the top MOSFETs turn on,
its RMS current capability must be adequate to withstand
the ripple current at the input, and the capacitance must be
large enough to maintain the input voltage until the input
supply can make up the difference. Generally, a capacitor
(particularly a non-ceramic type) that meets the first two
parameters will have far more capacitance than is required
to keep capacitance-based droop under control.
The input capacitor’s voltage rating should be at least 1.4
times the maximum input voltage. Power loss due to ESR
occurs not only as I²R dissipation in the capacitor itself,
but also in overall battery efficiency. For mobile applica-
tions, the input capacitors should store adequate charge
to keep the peak battery current within the manufacturer’s
specifications.
The input capacitor RMS current requirement is simplified
by the multiphase architecture and its impact on the
worst-case RMS current drawn through the input network
(battery/fuse/capacitor). It can be shown that the worst-
case RMS current occurs when only one controller is
operating. The controller with the highest (V_OUT)(I_OUT)
product needs to be used to determine the maximum RMS
current requirement. Increasing the output current drawn
from the other out-of-phase controller will actually de-
crease the input RMS ripple current from this maximum
value. The out-of-phase technique typically reduces the
input capacitor’s RMS ripple current by a factor of 30% to
70% when compared to a single phase power supply
solution.
In continuous mode, the source current of the top N-channel
MOSFET is approximately a square wave of duty cycle
V_OUT/V_IN. The maximum RMS capacitor current is given
by:
( ) _{IRMS ≈ IOUT(MAX)}
V_OUT V_IN – V_OUT
V_IN
This formula has a maximum at V_IN = 2V_OUT, where
I_RMS = I_OUT/2. This simple worst-case condition is com-
monly used for design because even significant devia-
tions do not offer much relief. The total RMS current is
lower when both controllers are operating due to the
interleaving of current pulses through the input capaci-
tors. This is why the input capacitance requirement calcu-
lated above for the worst-case controller is adequate for
the dual controller design.
Note that capacitor manufacturer’s ripple current ratings
are often based on only 2000 hours of life. This makes it
advisable to further derate the capacitor or to choose a
capacitor rated at a higher temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. Always consult the
manufacturer if there is any question.
3802f
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