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LTC3802_15 Datasheet, PDF (21/28 Pages) Linear Technology – Dual 550kHz Synchronous 2-Phase DC/DC Controller with Programmable Up/Down Tracking
LTC3802
APPLICATIO S I FOR ATIO
floating, it sits at around 2V and the internal phase-locked
loop synchronizes TG1’s falling edge to the falling edge of
the PLLIN signal. When PHASEMD is high, these two
signals are 90° out of phase. TG1 and TG2 remains 180°
out of phase independent of PHASEMD input.
The PHASEMD signal together with the PLL circuit can be
used to synchronize an additional LTC3802 power supply
circuit to provide a 4-phase, 4-output solution. Compared
to an in-phase multiple controller solution, the LTC3802’s
4-phase design reduces the input capacitor ripple current
requirements and efficiency losses because the peak
current drawn from the input capacitor is spaced out
within the switching cycle.
EXTERNAL COMPONENTS SELECTION
VCC and PVCC Power Supplies
Power for the top and bottom MOSFET drivers is derived
from the PVCC pin; the internal controller circuitry is de-
rived from the VCC pin. Under typical operating conditions,
the total current consumption at these two pins should be
well below 100mA. Hence, PVCC and VCC can be connected
to an external auxiliary 5V power supply. If an auxiliary
supply is not available, a simple zener diode and a darlington
NPN buffer can be used to power up these two pins as
shown in Figure 7. To prevent switching noise from cou-
pling to the sensitive analog control circuitry, VCC should
RZ
2k
100Ω
+
Q1
CIN
DCP
VOUT +
COUT
CCP
L QT
D1
QB
VIN
VINFF
BOOST
TG
SW
BG
LTC3802
+
PVCC
VZ
10µF
0.1µF
5.6V
10Ω
PGND
+
10µF
0.1µF
VCC
SGND
3802 F07
Q1: ZETEX FZT603
VZ: MM5Z6V2ST1
Figure 7. LTC3802 Power Supply Inputs
have a 10µF bypassed capacitor close to the device. The
BiCMOS process that allows the LTC3802 to include large
on-chip MOSFET drivers also limits the maximum PVCC
and VCC voltage to 7V. This limits the practical maximum
auxiliary supply to a loosely regulated 7V rail. If VCC drops
below 2.5V or PVCC drops below VCC by more than 1V, the
LTC3802 goes into undervoltage lockout and prevents the
power switches from turning on.
Top MOSFET Driver Supply
An external bootstrap capacitor, CCP, connected to the
BOOST pin supplies the gate drive voltage for the topside
MOSFET. This capacitor is charged through diode DCP
from PVCC when the switch node is low. When the top
MOSFET turns on, the switch node rises to VIN and the
BOOST pin rises to approximately VIN + PVCC. The boost
capacitor needs to store about 100 times the gate charge
required by the top MOSFET. In most applications a 0.1µF
to 1µF, X5R or X7R dielectric capacitor is adequate.
Power MOSFET Selection
The LTC3802 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the threshold voltage V(GS)TH,
breakdown voltage V(BR)DSS, maximum current IDS(MAX),
on-resistance RDS(ON) and input capacitance.
The gate drive voltage is set by the 5V PVCC supply.
Consequently, logic-level threshold MOSFETs must be
used in LTC3802 applications. If the PVCC voltage is
expected to drop below 5V, then sub-logic level threshold
MOSFETs should be considered. Pay close attention to the
V(BR)DSS specification, because most logic-level MOSFETs
are limited to 30V or less. The MOSFETs selected should
have a V(BR)DSS rating greater than the maximum input
voltage and some margin should be added for transients
and spikes. The MOSFETs selected should also have an
IDS(MAX) rating of at least two times the maximum power
stage output current. Still, this may not be a sufficient
margin so it is advisable to calculate the MOSFET’s junc-
tion temperature to ensure that it is not exceeded.
The LTC3802 uses the bottom MOSFET as the current
sense element, particular attention must be paid to its
3802f
21