LTC3802_15 Datasheet, PDF (13/28 Pages) Linear Technology – Dual 550kHz Synchronous 2-Phase DC/DC Controller with Programmable Up/Down Tracking

LTC3802
APPLICATIO S I FOR ATIO
The external inductor/output capacitor combination makes
a more significant contribution to loop behavior. These
components cause a second order LC roll-off at the output
with 180° phase shift. This roll-off is what filters the PWM
waveform, resulting in the desired DC output voltage, but
this phase shift causes stability issues in the feedback loop
and must be frequency compensated. At higher frequen-
cies, the reactance of the output capacitor will approach its
ESR, and the roll-off due to the capacitor will stop, leaving
– 20dB/decade and 90° of phase shift.
Figure 1 shows a Type 3 amplifier. The transfer function of
this amplifier is given by the following equation:
V_COMP
V_OUT
=
–₍1+ sC1R2_)[1+ s(R1+ R3)C3_]
sR1(C1+ C2)_[1+ s(C1//C2)R2_](1+ sC3R3₎
The RC network across the error amplifier and the
feedforward components R3 and C3 introduce two pole-
zero pairs to obtain a phase boost at the system unity gain
frequency, f_C. In theory, the zeros and poles are placed
symmetrically around f_C, and the spread between the
zeros and the poles is adjusted to give the desired phase
boost at f_C. However, in practice, if the crossover fre-
quency is much higher than the LC double-pole frequency,
this method of frequency compensation normally gener-
ates a phase dip within the unity bandwidth and creates
some concern regarding conditional stability.
If conditional stability is a concern, move the error
amplifier’s zero to a lower frequency to avoid excessive
phase dip. The following equations can be used to com-
pute the feedback compensation components value:
f_SW = Switching frequency
f_LC = _2π
1
LC_OUT
f_ESR
=
1
2πR_ESR C_OUT
choose:
f_C
=
Crossover
frequency
=
f_SW
10
f_Z1(ERR)
=
f_LC
=
1
2πR2C1
f_Z2(RES)
=
f_C
5
=
1
2π(R1+ R3)C3
f_P1(ERR)
=
f_ESR
=
1
2πR2(C1//
C2)
f_P2(RES)
=
5f_C
=
1
2πR3C3
Required error amplifier gain at frequency f_C:
≈ 40log
1+


f_C
f_LC


2
–
20log
1+


f_C
f_ESR


2
–
20log(A_MOD)
≈
20
log
R2
R1
•


1+


ff_LCC 

¹⁺
f_P2(RES)
f_C
1+
f_C
f_ESR
+
f_LC
f_ESR –
+ ^{fP2(RES) – fZ2(RES)}
f_Z2(RES)
f_LC




1+
f_P2(RES) 
f_C 


where A_MOD is the modulator and line feedforward gain
and is equal to:
A_MOD
≈
V_IN(MAX) • DC_MAX
V_SAW
=
30 • 0.89
1.2
≈ 22V/V
Once the value of resistor R1, poles and zeros location
have been decided, the value of R2, C1, C2, R3 and C3 can
be obtained from the above equations.
V_OUT
C3
C2
C1
R2
R1 R3 _–
FB
R_B
+
V_REF
–1
GAIN
0
COMP
PHASE
+1
–1
BOOST
FREQ
–90
–180
–270
–380
3802 F01
Figure 1. Type 3 Amplifier Compensation
3802f
13