LTC3445_15 Datasheet, PDF (22/24 Pages) Linear Technology – I2C Controllable Buck Regulator with Two LDOs

LTC3445
APPLICATIO S I FOR ATIO
DESIGN EXAMPLE
As a design example, assume the LTC3445 is used in a
single lithium-ion battery-powered Intel PXA270 micro-
processor application. The battery will be operating from
a maximum of 4.2V down to about 2.7V. Also, the battery
will be connected to all three power pins on the LTC3445.
The desired LDO outputs are 1.3V with a 23mA load and
1.1V with a 14mA load. Since both LDO’s are the same, we
will select LDO1 for the 1.3V output and LDO2 for the 1.1V
output. Using Equations 4 and 5, and choosing R2 and R4
to be 604k, the values for R1 and R2 are 705k and 503k
respectively. Also, selecting a 10µF output capacitor pro-
vides adequate stability and transient reponses.
The PXA270’s V_CC BATT requirement can be readily handled
by the LTC3445’s PowerPath control circuits. By simply
connecting a coin cell battery to V_BACKUP, the PowerPath
control circuits regulate V_CC BATT within the PXA270’s
requirements.
The buck regulator’s maximum load requirement for this
application is 300mA. Although the default start-up volt-
age for the buck regulator is 1.35V, ripple current is
greatest when the output voltage is programmed to 0.85V.
For ripple currents of 200mA and the main battery at 4.2V,
the required inductor value is 2.2µH (Equation 1). For best
efficiency choose a 400mA or greater inductor with less
than 0.3Ω series resistance. Choosing a 10µF output
capacitor with an ESR of 0.25Ω will generate a ripple
voltage of 52mV (Equation 3). In most cases, a ceramic
capacitor’s ESR will be less than 0.25Ω further reducing
the output ripple (see Figure 11). Note that as V_CC1
decreases or V_OUT increases, the ripple current and ripple
voltage will decrease. The input capacitor, C_IN, will require
an RMS current rating of at least 0.150A ≅ I_LOAD(MAX)/2 at
temperature (Equation 2).
2.5V TO 5.5V
LITHIUM ION
SYS_EN
LTC3406
BUCK
3V_TYP
INTEL PXA270
3V
COIN CELL
V_CC
nV_CC_FAULT
20k ^VBACKUP
PGOOD
V_TRACK
BATTFAULT
nBATT_FAULT
20k
PWR_EN
V_CC
10µF
CER
I²C BUS
RUN
V_CC BATT
V_CC1
V_CC1
V_CC2
LTC3445
ADD7
SW
FB
LDO1
SUMIDA
CDRH3D16/HP2R2
2.2µH
705k
ADD6
LDO1FB
604k
V_CC_IO
3V
V_CC_BATT
0.85V TO
1.55V
10µF
CER
V_CC_CORE
1.3V
V_CC_PLL
10µF
CER
3k 3k
SCL
LDO2
SDA
LDO2FB
503k
604k
1.1V
V_CC_SRAM
10µF
CER
3445 F11
Figure 11. Design Example
3445fa
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