LTC4007_1 Datasheet, PDF (20/24 Pages) Linear Technology – 4A, High Efficiency, Standalone Li-Ion Battery Charger

LTC4007
APPLICATIO S I FOR ATIO
General Rules
7. Connection of switching ground to system ground or
internal ground plane should be single point. If the
system has an internal system ground plane, a good
way to do this is to cluster vias into a single star point
to make the connection.
8. Route analog ground as a trace tied back to IC ground
(analog ground pin if present) before connecting to
any other ground. Avoid using the system ground
plane. CAD trick: make analog ground a separate
ground net and use a 0Ω resistor to tie analog ground
to system ground.
9. A good rule of thumb for via count for a given high
current path is to use 0.5A per via. Be consistent.
10. If possible, place all the parts listed above on the same
PCB layer.
11. Copper fills or pours are good for all power connec-
tions except as noted above in Rule 3. You can also use
copper planes on multiple layers in parallel too—this
helps with thermal management and lower trace in-
ductance improving EMI performance further.
12. For best current programming accuracy provide a
Kelvin connection from R_SENSE to CSP and BAT. See
Figure 12 as an example.
It is important to keep the parasitic capacitance on the R_T,
CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.
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