LTC3707 Datasheet, PDF (19/32 Pages) Linear Technology – High Effi ciency, 2-Phase Synchronous Step-Down Switching Regulator

LTC3707
APPLICATIONS INFORMATION
Topside MOSFET Driver Supply (C_B, D_B)
External bootstrap capacitors C_B connected to the BOOST
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor C_B in the functional diagram is charged though
external diode D_B from INTV_CC when the SW pin is low.
When one of the topside MOSFETs is to be turned on,
the driver places the C_B voltage across the gate-source
of the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. The switch node voltage, SW,
rises to V_IN and the BOOST pin follows. With the topside
MOSFET on, the boost voltage is above the input supply:
V_BOOST = V_IN + V_INTVCC. The value of the boost capacitor
C_B needs to be 100 times that of the total input capacitance
of the topside MOSFET(s). The reverse breakdown of the
external Schottky diode must be greater than V_IN(MAX).
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the efficiency has
improved. If there is no change in input current, then there
is no change in efficiency.
Output Voltage
The LTC3707 output voltages are each set by an external
feedback resistive divider carefully placed across the output
capacitor. The resultant feedback signal is compared with
the internal precision 0.800V voltage reference by the error
amplifier. The output voltage is given by the equation:
V_OUT
=
0.8V
⎛
⎝⎜
1+
R2 ⎞
R1⎠⎟
SENSE⁺/SENSE^– Pins
The common mode input range of the current comparator
sense pins is from 0V to (1.1)INTV_CC. Continuous linear
operation is guaranteed throughout this range allowing
output voltage setting from 0.8V to 7.7V, depending upon
the voltage applied to EXTV_CC. A differential NPN input
stage is biased with internal resistors from an internal 2.4V
source as shown in the Functional Diagram. This requires
that current either be sourced or sunk from the SENSE
pins depending on the output voltage. If the output voltage
is below 2.4V current will flow out of both SENSE pins to
the main output. The output can be easily preloaded by
the V_OUT resistive divider to compensate for the current
comparator’s negative input bias current. The maximum
current flowing out of each pair of SENSE pins is:
I_SENSE+ + I_SENSE– = (2.4V – V_OUT)/24k
Since V_OSENSE is servoed to the 0.8V reference voltage,
we can choose R1 in Figure 2 to have a maximum value
to absorb this current.
R1_(MAX
)
=
24k
⎛
⎝⎜
0.8V
2.4V – V_OUT
⎞
⎠⎟
for V_OUT < 2.4V
Regulating an output voltage of 1.8V, the maximum value
of R1 should be 32K. Note that for an output voltage above
2.4V, R1 has no maximum value necessary to absorb the
sense currents; however, R1 is still bounded by the V_OSENSE
feedback current.
Soft-Start/Run Function
The RUN/SS1 and RUN/SS2 pins are multipurpose pins
that provide a soft-start function and a means to shut down
the LTC3707. Soft-start reduces the input power source’s
surge currents by gradually increasing the controller’s
current limit (proportional to V_ITH). This pin can also be
used for power supply sequencing.
An internal 1.2μA current source charges up the C_SS ca-
pacitor_. When the voltage on RUN/SS1 (RUN/SS2) reaches
1.5V, the particular controller is permitted to start operating.
As the voltage on RUN/SS increases from 1.5V to 3.0V,
the internal current limit is increased from 25mV/R_SENSE
to 75mV/R_SENSE. The output current limit ramps up slowly,
taking an additional 1.25s/μF to reach full current. The
output current thus ramps up slowly, reducing the start-
ing surge current required from the input power supply.
If RUN/SS has been pulled all the way to ground there is
a delay before starting of approximately:
t_DELAY
=
1.5V
1.2µA
C_SS
=
(1.25s
/
µF
)C_SS
t_IRAMP
=
3V − 1.5V
1.2µA
C_SS
=
(1.25s
/
µF
)C_SS
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