LTC3616 Datasheet, PDF (19/28 Pages) Linear Technology – 6A, 4MHz Monolithic Synchronous Step-Down DC/DC Converter

LTC3616
APPLICATIONS INFORMATION
DDR Mode
The LTC3616 can both source and sink current if the MODE
pin is configured to forced continuous mode.
Current sinking is typically limited to 3A for 1MHz frequency
and a 0.47μH inductor, but can be lower at higher frequen-
cies and low output voltages. If higher ripple current can
be tolerated, smaller inductor values can increase the sink
current limit. See the Typical Performance Characteristics
curves for more information.
In addition, tying the SRLIM/DDR pin to SV_IN, lower
external reference voltage and tracking output voltage
between channels are possible. See the Output Voltage
Tracking and External Reference Input sections.
Soft-Start
The RUN pin provides a means to shut down the LTC3616.
Tying the RUN pin to SGND places the LTC3616 in a low
quiescent current shutdown state (I_Q < 1μA).
When the LTC3616 is enabled by pulling the RUN pin high,
the chip enters a soft start-up state. The type of soft start-
up behavior is set by the TRACK/SS pin:
1. Tying TRACK/SS to SV_IN selects the internal soft-start
circuit. This circuit ramps the output voltage to the final
value within 1ms.
2. If a longer soft-start period is desired, it can be set ex-
ternally with a resistor and capacitor on the TRACK/SS
pin as shown in Figure 1. The TRACK/SS pin reduces the
value of the internal reference at V_FB until TRACK/SS is
pulled above 0.6V. The external soft-start duration can
be calculated by using the following formula:
t_SS
= R_SS
• C_SS
• ln^{⎛⎝⎜}
SV_IN ⎞
SV_IN – 0.6V ⎠⎟
3. The TRACK/SS pin can be used to track the output
voltage of another supply.
Each time the RUN pin is tied high and the LTC3616 is
turned on, the TRACK/SS pin is internally pulled down
for ten microseconds in order to discharge the external
capacitor. This discharging time is typically adequate
for capacitors up to about 33nF. If a larger capacitor is
required, connect the external soft-start resistor to the
RUN pin.
Regardless of either internal or external soft-start state,
the MODE pin is ignored and soft-start will always be
in pulse-skipping mode. In addition, the PGOOD pin
is kept low and foldback of the switching frequency is
disabled.
Programmable Switch Pin Slew Rate
As switching frequencies rise, it is desirable to minimize the
transition time required when switching to minimize power
losses and blanking time for the switch to settle. However,
fast slewing of the switch node results in relatively high
external radiated EMI and high on chip supply transients,
which can cause problems for some applications.
10k
100k
OPEN
OPEN
100k
10k
V_IN = 3.3V
V_OUT = 1.8V
f_SW = 2.25MHz
2ns/DIV
V_IN = 3.3V
V_OUT = 1.8V
f_SW = 2.25MHz
2ns/DIV
3616 F05
Figure 5. Slew Rate at SW Pin vs SRLIM/DDR Resistor: Open, 100k, 10k
3616f
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