LTC3555 Datasheet, PDF (19/32 Pages) Linear Technology – High Effi ciency USB Power Manager + Triple Step-Down DC/DC

LTC3555/LTC3555-X
OPERATION
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
NTC Thermistor
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to the
battery pack.
To use this feature, connect the NTC thermistor, R_NTC,
between the NTC pin and ground and a resistor, R_NOM,
from V_BUS to the NTC pin. R_NOM should be a 1% resistor
with a value equal to the value of the chosen NTC therm-
istor at 25°C (R25). For applications requiring greater
than 750mA of charging current, a 10k NTC thermistor is
recommended due to increased interference.
The LTC3555 family will pause charging when the
resistance of the NTC thermistor drops to 0.54 times
the value of R25 or approximately 5.4k. For a Vishay
“Curve 1” thermistor, this corresponds to approximately
40°C. If the battery charger is in constant voltage (float)
mode, the safety timer also pauses until the thermistor
indicates a return to a valid temperature. As the tempera-
ture drops, the resistance of the NTC thermistor rises. The
LTC3555 family is also designed to pause charging when
the value of the NTC thermistor increases to 3.25 times
the value of R25. For Vishay “Curve 1” this resistance,
32.5k, corresponds to approximately 0°C. The hot and cold
comparators each have approximately 3°C of hysteresis
to prevent oscillation about the trip point. Grounding the
NTC pin disables the NTC charge pausing function.
Thermal Regulation
To optimize charging time, an internal thermal feedback
loop may automatically decrease the programmed charge
current. This will occur if the die temperature rises to
approximately 110°C. Thermal regulation protects the
LTC3555 family from excessive temperature due to high
power operation or high ambient thermal conditions and
allows the user to push the limits of the power handling
capability with a given circuit board design without risk of
damaging the part or external components. The benefit of
the LTC3555 family thermal regulation loop is that charge
current can be set according to actual conditions rather
than worst-case conditions with the assurance that the
battery charger will automatically reduce the current in
worst-case conditions.
I²C Interface
The LTC3555 family may receive commands from a host
(master) using the standard I²C 2-wire interface. The Timing
Diagram shows the timing relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
when the bus is not in use. External pull-up resistors or
current sources, such as the LTC1694 I²C accelerator, are
required on these lines. The LTC3555 family is a receive-
only slave device. The I²C control signals, SDA and SCL
are scaled internally to the DV_CC supply. DV_CC should be
connected to the same power supply as the microcontroller
generating the I²C signals.
The I²C port has an undervoltage lockout on the DV_CC
pin. When DV_CC is below approximately 1V, the I²C serial
port is cleared and switching regulators 2 and 3 are set
to full scale.
Bus Speed
The I²C port is designed to be operated at speeds of up
to 400kHz. It has built-in timing delays to ensure correct
operation when addressed from an I²C compliant master
device. It also contains input filters designed to suppress
glitches should the bus become corrupted.
Start and Stop Conditions
A bus-master signals the beginning of a communication to
a slave device by transmitting a START condition. A START
condition is generated by transitioning SDA from high to
low while SCL is high. When the master has finished com-
municating with the slave, it issues a STOP condition by
transitioning SDA from low to high while SCL is high.
Byte Format
Each byte sent to the LTC3555 family must be eight bits
long followed by an extra clock cycle for the acknowledge
bit to be returned by the LTC3555 family. The data should
be sent to the LTC3555 family most significant bit (MSB)
first.
3555fd
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