LTC3555 Datasheet, PDF (11/32 Pages) Linear Technology – High Effi ciency USB Power Manager + Triple Step-Down DC/DC

LTC3555/LTC3555-X
PIN FUNCTIONS
LDO3V3 (Pin 1): 3.3V LDO Output Pin. This pin provides
a regulated always-on 3.3V supply voltage. LDO3V3
gets its power from V_OUT. It may be used for light loads
such as a watchdog microprocessor or real time clock.
A 1μF capacitor is required from LDO3V3 to ground. If
the LDO3V3 output is not used it should be disabled by
connecting it to V_OUT.
CLPROG (Pin 2): USB Current Limit Program and Moni-
tor Pin. A resistor from CLPROG to ground determines
the upper limit of the current drawn from the V_BUS pin.
A fraction of the V_BUS current is sent to the CLPROG pin
when the synchronous switch of the PowerPath switching
regulator is on. The switching regulator delivers power until
the CLPROG pin reaches 1.188V. Several V_BUS current limit
settings are available via user input which will typically
correspond to the 500mA and 100mA USB specifications.
A multi-layer ceramic averaging capacitor or R-C network
is required at CLPROG for filtering.
NTC (Pin 3): Input to the Thermistor Monitoring Circuits.
The NTC pin connects to a battery’s thermistor to deter-
mine if the battery is too hot or too cold to charge. If the
battery’s temperature is out of range, charging is paused
until it re-enters the valid range. A low drift bias resistor
is required from V_BUS to NTC and a thermistor is required
from NTC to ground. If the NTC function is not desired,
the NTC pin should be grounded.
FB2 (Pin 4): Feedback Input for Switching Regulator 2.
When regulator 2’s control loop is complete, this pin servos
to 1 of 16 possible set-points based on the commanded
value from the I²C serial port. See Table 4.
V_IN2 (Pin 5): Power Input for Switching Regulator 2.
This pin will generally be connected to V_OUT. A 1μF MLCC
capacitor is recommended on this pin.
SW2 (Pin 6): Power Transmission Pin for Switching
Regulator 2.
EN2 (Pin 7): Logic Input. This logic input pin indepen-
dently enables switching regulator 2. This pin is logically
OR-ed with its corresponding bit in the I²C serial port.
See Table 2.
DV_CC (Pin 8): Logic Supply for the I²C Serial Port. If the
serial port is not needed it can be disabled by grounding
DV_CC. When DV_CC is grounded, chip control is automati-
cally passed to the individual logic input pins.
SCL (Pin 9): Clock Input Pin for the I²C Serial Port. The
I²C logic levels are scaled with respect to DV_CC. If DV_CC
is grounded, the SCL pin is equivalent to the B5 bit in the
I²C serial port. SCL in conjunction with SDA determine
the operating modes of switching regulators 1, 2 and 3
when DV_CC is grounded. See Tables 2 and 5.
SDA (Pin 10): Data Input Pin for the I²C Serial Port. The
I²C logic levels are scaled with respect to DV_CC. If DV_CC
is grounded, the SDA pin is equivalent to the B6 bit in the
I²C serial port. SDA in conjunction with SCL determine
the operating modes of switching regulators 1, 2 and 3
when DV_CC is grounded. See Tables 2 and 5.
V_IN3 (Pin 11): Power Input for Switching Regulator 3.
This pin will generally be connected to V_OUT. A 1μF MLCC
capacitor is recommended on this pin.
SW3 (Pin 12): Power Transmission Pin for Switching
Regulator 3.
EN3 (Pin 13): Logic Input. This logic input pin indepen-
dently enables switching regulator 3. This pin is logically
OR-ed with its corresponding bit in the I²C serial port.
See Table 2.
FB3 (Pin 14): Feedback Input for Switching Regulator 3.
When regulator 3’s control loop is complete, this pin servos
to 1 of 16 possible set-points based on the commanded
value from the I²C serial port. See Table 4.
RST3 (Pin 15): Logic Output. This in an open-drain output
which indicates that switching regulator 3 has settled to
its final value. It can be used as a power-on reset for the
primary microprocessor or to enable the other switching
regulators for supply sequencing.
EN1 (Pin 16): Logic Input. This logic input pin indepen-
dently enables switching regulator 1. This pin is logically
OR-ed with its corresponding bit in the I²C serial port.
See Table 2.
3555fd
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