LTC3711 Datasheet, PDF (17/24 Pages) Linear Technology – 5-Bit Adjustable, Wide Operating Range, No RSENSE

LTC3711
APPLICATIO S I FOR ATIO
current, but requires a diode to isolate C_SS. Any pull-up
network must be able to pull RUN/SS above the 4.2V
maximum threshold of the latchoff circuit and overcome
the 4µA maximum discharge current.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3711 circuits:
1. DC I²R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode the average output current flows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same R_DS(ON), then the
resistance of one MOSFET can simply be summed with the
resistances of L and the board traces to obtain the DC I²R
loss. For example, if R_DS(ON) = 0.01Ω and R_L = 0.005Ω, the
loss will range from 1% up to 10% as the output current
varies from 1A to 10A for a 1.5V output.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the input
voltage, load current, driver strength and MOSFET capaci-
tance, among other factors. The loss is significant at input
voltages above 20V and can be estimated from:
Transition Loss ≅ (1.7A^–1) V_IN2 I_OUT C_RSS f
3. INTV_CC current. This is the sum of the MOSFET driver
and control currents. This loss can be reduced by supply-
ing INTV_CC current through the EXTV_CC pin from a high
efficiency source, such as an output derived boost net-
work or alternate supply if available.
4. C_IN loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I²R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
Other losses, including C_OUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V_OUT immediately shifts by an amount
equal to ∆I_LOAD (ESR), where ESR is the effective series
resistance of C_OUT. ∆I_LOAD also begins to charge or
discharge C_OUT generating a feedback error signal used
by the regulator to return V_OUT to its steady-state value.
During this recovery time, V_OUT can be monitored for
overshoot or ringing that would indicate a stability
problem. The I_TH pin external components shown in
BOOST
INTV_CC
Q1
FMMT619
Q3
FMMT619
10Ω
TG
GATE
OF M1
BG
10Ω
GATE
OF M2
Q2
Q4
FMMT720
FMMT720
SW
PGND
3711 F07
Figure 7. Optional External Gate Driver
INTV_CC
3.3V OR 5V
D1
V_IN
RUN/SS
R_SS*
C_SS
(8a)
R_SS*
D2* ^RUN/SS
C_SS
3711 F08
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
(8b)
Figure 8. RUN/SS Pin Interfacing with Latchoff Defeated
3711f
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