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LTC3615 Datasheet, PDF (15/32 Pages) Linear Technology – Dual 4MHz, 3A Synchronous Step-Down DC/DC Converter
LTC3615
Applications Information
Operating Frequency
Selection of the operating frequency is a trade-off between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves efficiency by
reducing internal gate charge losses but requires larger
inductance values and/or capacitance to maintain low
output ripple voltage.
The operating frequency of the LTC3615 is determined by
an external resistor that is connected between pin RT/SYNC
and ground. The value of the resistor sets the ramp current
that is used to charge and discharge an internal timing
capacitor within the oscillator and can be calculated by
using the following equation:
RT
=
4
•
1011ΩHz
fOSC
Although frequencies as high as 4MHz are possible, the
minimum on-time of the LTC3615 imposes a minimum
limit on the operating duty cycle. The minimum on-time
is typically 60ns, therefore, the minimum duty cycle is
equal to 60ns • 100% • fOSC(Hz)
Tying the RT/SYNC pin to SVIN sets the default internal
operating frequency to 2.25MHz ±20%.
Frequency Synchronization
The LTC3615’s internal oscillator can be synchronized to
an external frequency by applying a square wave clock
signal to the RT/SYNC pin. During synchronization, the
top MOSFET turn-on of channel 1 is locked to the rising
edge of the external frequency source. The synchronization
frequency range is 400kHz to 4MHz. The internal slope
compensation is automatically adapted to the external
clock frequency.
In the signal path from the RT/SYNC clock input to the
SW output, the LTC3615 is processing the external clock
frequency through an internal PLL.
After detecting an external clock on the first rising edge
of RT/SYNC the PLL starts up with the internal default of
2.25MHz. The internal PLL then requires a certain number
VIN
3.3V
47µF
47µF
1µF
SVIN (2s) PVIN1 (2s) PVIN2
RUN1
(2s) SW1
0.47µH
VOUT1
1.8V/3A
RSS
4.7M
R1
47µF
422k
CSS
10nF
RC
15k
10pF
RT, 200k
TRACK/SS1
PGOOD1
ITH1
LTC3615
FB1
MODE
R2
29.4k
R3
178k
CC
1000pF
RSRLIM
40.2k
RT /SYNC
SRLIM
PHASE
0.47µH
(2s) SW2
R5
665k
FB2
VOUT2
2.5V/3A
47µF
RUN2
TRACK/SS2
R4
210k
PGOOD2
ITH2 SGND PGND
3615 F03
Figure 3. Soft-Start and Compensation for Channel 1 Externally Programmed,
Soft-Start and Compensation for Channel 2 Internally Programmed
3615f
15