LTC3807_15 Datasheet, PDF (13/32 Pages) Linear Technology – Low IQ, Synchronous Step-Down Controller with 24V Output Voltage Capability

LTC3807
OPERATION
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping or Forced Continuous Mode)
(PLLIN/MODE Pin)
The LTC3807 can be enabled to enter high efficiency Burst
Mode operation, constant frequency pulse-skipping mode,
or forced continuous conduction mode at low load cur-
rents. To select Burst Mode operation, tie the PLLIN/MODE
pin to SGND. To select forced continuous operation, tie
the PLLIN/MODE pin to INTV_CC. To select pulse-skipping
mode, tie the PLLIN/MODE pin to a DC voltage greater
than 1.2V and less than INTV_CC – 1.3V.
When the controller is enabled for Burst Mode opera-
tion, the minimum peak current in the inductor is set to
approximately 25% of the maximum sense voltage even
though the voltage on the ITH pin indicates a lower value.
If the average inductor current is higher than the load cur-
rent, the error amplifier, EA, will decrease the voltage on
the ITH pin. When the ITH voltage drops below 0.425V,
the internal sleep signal goes high (enabling sleep mode)
and both external MOSFETs are turned off. The ITH pin is
then disconnected from the output of the EA and parked
at 0.450V.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3807 draws to
only 50μA. In sleep mode, the load current is supplied by
the output capacitor. As the output voltage decreases, the
EA’s output begins to rise. When the output voltage drops
enough, the ITH pin is reconnected to the output of the
EA, the sleep signal goes low, and the controller resumes
normal operation by turning on the top external MOSFET
on the next cycle of the internal oscillator.
When the controller is enabled for Burst Mode operation,
the inductor current is not allowed to reverse. The reverse
current comparator, IR, turns off the bottom external
MOSFET just before the inductor current reaches zero,
preventing it from reversing and going negative. Thus, the
controller operates in discontinuous operation.
In forced continuous operation or clocked by an external
clock source to use the phase-locked loop (see Frequency
Selection and Phase-Locked Loop section), the inductor
current is allowed to reverse at light loads or under large
transient conditions. The peak inductor current is deter-
mined by the voltage on the ITH pin, just as in normal
operation. In this mode, the efficiency at light loads is
lower than in Burst Mode operation. However, continu-
ous operation has the advantage of lower output voltage
ripple and less interference to audio circuitry. In forced
continuous mode, the output ripple is independent of
load current.
When the PLLIN/MODE pin is connected for pulse-skipping
mode, the LTC3807 operates in PWM pulse-skipping
mode at light loads. In this mode, constant frequency
operation is maintained down to approximately 1% of
designed maximum output current. At very light loads, the
current comparator, ICMP, may remain tripped for several
cycles and force the external top MOSFET to stay off for
the same number of cycles (i.e., skipping pulses). The
inductor current is not allowed to reverse (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audio noise and
reduced RF interference as compared to Burst Mode
operation. It provides higher low current efficiency than
forced continuous mode, but not nearly as high as Burst
Mode operation.
Frequency Selection and Phase-Locked Loop (FREQ
and PLLIN/MODE Pins)
The selection of switching frequency is a trade-off between
efficiency and component size. Low frequency opera-
tion increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The switching frequency of the LTC3807 can be selected
using the FREQ pin.
If the PLLIN/MODE pin is not being driven by an external
clock source, the FREQ pin can be tied to SGND, tied
to INTV_CC or programmed through an external resistor.
Tying FREQ to SGND selects 350kHz while tying FREQ to
INTV_CC selects 535kHz. Placing a resistor between FREQ
and SGND allows the frequency to be programmed between
50kHz and 900kHz, as shown in Figure 9.
A phase-locked loop (PLL) is available on the LTC3807
to synchronize the internal oscillator to an external clock
source that is connected to the PLLIN/MODE pin. The
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3807f
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