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LTC3805-5_15 Datasheet, PDF (13/20 Pages) Linear Technology – Adjustable Frequency Current Mode Flyback/ Boost/SEPIC DC/DC Controller
LTC3805-5
APPLICATIONS INFORMATION
Feedback in Isolated Applications
Isolated applications do not use the FB pin and error ampli-
fier but control the ITH pin directly using an opto-isolator
driven on the other side of the isolation barrier as shown
in Figure 4. For isolated converters, the FB pin is grounded
which provides pull-up on the ITH pin. This pull-up is not
enough to properly bias the opto-isolator which is typically
biased using a resistor to VCC. Since the ITH pin cannot
sink the opto-isolator bias current, a diode is required to
block it from the ITH pin. A low leakage Schottky diode,
or low forward voltage PN junction diode, should be used
to ensure that the opto-isolator is able to pull ITH down
to its lower clamp.
Oscillator Synchronization
The oscillator may be synchronized to an external clock
by connecting the synchronization signal to the SYNC pin.
The LTC3805-5 oscillator and turn-on of the switch are
synchronized to the rising edge of the external clock. The
frequency of the external sync signal must be ±33% with
respect to fOSC (as programmed by RFS). Additionally, the
value of fSYNC must be between 70kHz and 700kHz.
Current Sense Resistor Considerations
The external current sense resistor (RSENSE in Figure 8)
allows the user to optimize the current limit behavior for
the particular application. As the current sense resistor
is varied from several ohms down to tens of milliohms,
peak switch current goes from a fraction of an ampere to
several amperes. Care must be taken to ensure proper
circuit operation, especially with small current sense
resistor values.
ISOLATION
BARRIER
VCC
LTC3805-5
ITH
For example, with the peak current sense voltage of 100mV
on the ISENSE pin, a peak switch current of 5A requires
a sense resistor of 0.020W. Note that the instantaneous
peak power in the sense resistor is 0.5W and it must be
rated accordingly. The LTC3805-5 has only a single sense
line to this resistor. Therefore, any parasitic resistance
in the ground side connection of the sense resistor will
increase its apparent value. In the case of a 0.020W sense
resistor, one milliohm of parasitic resistance will cause a
5% reduction in peak switch current. So the resistance of
printed circuit copper traces and vias cannot necessarily
be ignored.
Programmable Slope Compensation
The LTC3805-5 injects a ramping current through its ISENSE
pin into an external slope compensation resistor RSLOPE.
This current ramp starts at zero right after the GATE pin
has been high for the LTC3805-5’s minimum duty cycle
of 6%. The current rises linearly towards a peak of 10µA
at the maximum duty cycle of 80%, shutting off once the
GATE pin goes low. A series resistor RSLOPE connecting the
ISENSE pin to the current sense resistor RSENSE develops a
ramping voltage drop. From the perspective of the ISENSE
pin, this ramping voltage adds to the voltage across the
sense resistor, effectively reducing the current comparator
threshold in proportion to duty cycle. This stabilizes the
control loop against subharmonic oscillation. The amount
of reduction in the current comparator threshold (DVSENSE)
can be calculated using the following equation:
DVSENSE
=
Duty
Cycle
80%
−
6%
10µA
•
RSLOPE
Note: LTC3805-5 enforces 6% < Duty Cycle < 80%. A good
starting value for RSLOPE is 3k, which gives a 30mV drop
in current comparator threshold at 80% duty cycle.
Designs that do not operate at greater than 50% duty cycle
do not need slope compensation and may replace RSLOPE
with a direct connection.
FB
GND
38055 F04
Figure 4. Circuit for Isolated Feedback
38055fe
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