LTC3548A Datasheet, PDF (13/20 Pages) Linear Technology – Dual Synchronous 400mA/800mA, 2.25MHz Step-Down DC/DC Regulator

LTC3548A
APPLICATIONS INFORMATION
For approximately a 1ms ramp time, use R_SS = 4.7M and
C_SS = 680pF at V_IN = 3.3V.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% - (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, 4 main sources usually account for most of the
losses in LTC3548A circuits: 1. V_IN quiescent current, 2.
switching losses, 3. I²R losses, 4. other losses.
1. The V_IN current is the DC supply current given in
the Electrical Characteristics section which excludes
MOSFET driver and control currents. V_IN current results
in a small (<0.1%) loss that increases with V_IN, even at
no load.
2. The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from V_IN to ground. The resulting dQ/dt is a current
out of V_IN that is typically much larger than the DC bias
current. In continuous mode, I_GATECHG = f_O(Q_T + Q_B),
where Q_T and Q_B are the gate charges of the internal
top and bottom MOSFET switches. The gate charge
losses are proportional to V_IN and thus their effects
will be more pronounced at higher supply voltages.
3. I²R losses are calculated from the DC resistances of
the internal switches, R_SW, and external inductor, R_L.
In continuous mode, the average output current flows
through inductor L, but is chopped between the internal
top and bottom switches. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET R_DS(ON) and the duty cycle (D) as
follows:
R_SW = (R_DS(ON)TOP)(D) + (R_DS(ON)BOT)(1 – D)
The R_DS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I²R losses:
I²R losses = I_OUT2(R_SW + RL)
4. Other hidden losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important
to include these system level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that C_IN has adequate
charge storage and very low ESR at the switching fre-
quency. Other losses including diode conduction losses
during dead time and inductor core losses generally
account for less than 2% total additional loss.
Thermal Considerations
In a majority of applications, the LTC3548A does not
dissipate much heat due to its high efficiency. However,
in applications where the LTC3548A is running at high
ambient temperature with low supply voltage and high
duty cycles, such as in dropout, the heat dissipated may
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 150°C,
both power switches will be turned off and the SW node
will become high impedance.
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