LTC3330_15 Datasheet, PDF (13/32 Pages) Linear Technology – Nanopower Buck-Boost DC/DC with Energy Harvesting Battery Life Extender

LTC3330
PIN FUNCTIONS
IPK0, IPK1, IPK2 (Pins 17, 18, 19): I_{PEAK_BB} Select Bits
for the Buck-Boost Switching Regulator. Tie high to V_IN3
or low to GND to select the desired I_{PEAK_BB} (see Table 3).
Do not float.
LDO_OUT (Pin 20): Regulated LDO Output. This output
can be used as a quiet supply. One of the eight settings
provides for a current limited switched output where
LDO_OUT = LDO_IN.
LDO_IN (Pin 21): Input Voltage for the LDO regulator.
LDO2, LDO1, LDO0 (Pins 22, 23, 24): LDO Voltage Select
Bits. Tie high to LDO_IN or low to GND to select the desired
LDO_OUT voltage (see Table 2). Do not float.
LDO_EN (Pin 25): LDO Enable Input. Active high input with
logic levels referenced to LDO_IN. Do not float.
V_IN3 (Pin 26): Internal Low Voltage Rail Used by the Pri-
oritizer. Logic high reference for IPK[2:0] and OUT[2:0].
Connect a 1µF (or larger) capacitor from V_IN3 to GND.
This pin is not intended for use as an external system rail.
PGLDO (Pin 27): Power Good Output for LDO_OUT.
Logic level output referenced to an internal maximum
rail (see Operation). PGLDO transitioning high indicates
92% (typical) regulation has been reached on LDO_OUT.
PGLDO remains high until LDO_OUT falls to 90% (typical)
of the programmed regulation point.
PGVOUT (Pin 28): Power Good Output for V_OUT. Logic
level output referenced to an internal maximum rail (see
Operation). PGVOUT transitioning high indicates regula-
tion has been reached on V_OUT (V_OUT = Sleep Rising).
PGVOUT remains high until V_OUT falls to 92% (typical)
of the programmed regulation point.
EH_ON (Pin 29): Switcher Status. Logic level output
referenced to V_IN3. EH_ON is high when the buck switching
regulator is in use. It is pulled low when the buck-boost
switching regulator is in use.
OUT0, OUT1, OUT2 (Pins 30, 31, 32): V_OUT Voltage Select
Bits. Tie high to V_IN3 or low to GND to select the desired
V_OUT (see Table 1). Do not float.
GND (Exposed Pad Pin 33): Ground. The exposed pad
must be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC3330.
For more information www.linear.com/LTC3330
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