LT3752_15 Datasheet, PDF (13/52 Pages) Linear Technology – Active Clamp Synchronous Forward Controllers with Internal Housekeeping Controller

LT3752/LT3752-1
TYPICAL PERFORMANCE CHARACTERISTICS T_A = 25°C, unless otherwise noted.
OUT Maximum Duty Cycle Clamp
(D_VSEC) vs UVLO_V_SEC
80
V_IN = 12V
70
R_T = 24.9k (300kHz)
R_IVSEC = 51.1k
60
50
Required R_IVSEC vs Switching
Frequency (for D_VSEC × 100 = 72.5%,
UVLO_VSEC = 1.25V)
160
140
120
100
OUT Pin Rise/Fall Times
vs OUT Pin Load Capacitance
60
INTV_CC = 12V
(OVERDRIVEN FROM
50 HOUSEKEEPING SUPPLY)
40
40
80
30
30
60
20
20
40
10
10
20
0
0 1.25 2.5 3.75 5 6.25 7.5 8.75 10
UVLO_VSEC (V)
3752 G33
0
100 150 200 250 300 350 400 450 500
SWITCHING FREQUENCY (kHz)
3752 G34
0
0 1 2 3 4 5 6 7 8 9 10
OUT PIN LOAD CAPACITANCE (nF)
3752 G35
PIN FUNCTIONS
HFB (Pin 1): Housekeeping Supply Error Amplifier
Inverting Input.
HCOMP (Pin 2): Housekeeping Supply Error Amplifier
Output and Compensation Pin.
RT (Pin 3): A resistor to ground programs switching
frequency.
FB (Pin 4): Error Amplifier Inverting Input.
COMP (Pin 5): Error Amplifier Output. Allows various
compensation networks for nonisolated applications.
SYNC (Pin 6): Allows synchronization of internal oscillator
to an external clock. f_SYNC equal to f_OSC allowed.
SS1 (Pin 7): Capacitor controls soft-start/stop of switch-
ing frequency and volt-second clamp. During soft-stop it
also controls the COMP pin.
IVSEC (Pin 8): Resistor Programs OUT Pin Maximum
Duty Cycle Clamp (D_VSEC). This clamp moves inversely
proportional to system input voltage to provide a volt-
second clamp.
UVLO_V_SEC (Pin 9): A resistor divider from system in-
put allows switch maximum duty cycle to vary inversely
proportional with system input. This volt-second clamp
prevents transformer saturation for duty cycles above
50%. Resistor divider ratio programs undervoltage lockout
(UVLO) threshold. A 5µA pin current hysteresis allows
programming of UVLO hysteresis. Pin below 0.4V reduces
V_IN currents to microamps.
OVLO (Pin 10): A resistor divider from system input
programs overvoltage lockout (OVLO) threshold. Fixed
hysteresis included.
T_AO (Pin 11): A resistor programs nonoverlap timing
between AOUT rise and OUT rise control signals.
T_AS (Pin 12): Resistors at T_AO and T_AS define delay between
SOUT fall and OUT rise (= t_AO – t_AS).
T_OS (Pin 13): Resistor programs delay between OUT fall
and SOUT rise.
T_BLNK (Pin 14): Resistor programs extended blanking of
I_SENSEP and OC signals during MOSFET turn-on.
NC (Pins 15, 16, 37): No Connect Pins. These pins are not
connected inside the IC. These pins should be left open.
SS2 (Pin 17): Capacitor controls soft-start of COMP pin.
Alternatively can connect to OPTO to communicate start of
switching to secondary side. If unused, leave the pin open.
GND (Pin 18): Analog Signal Ground. Electrical connection
exists inside the IC to the exposed pad (Pin 39).
For more information www.linear.com/LT3752
3752fb
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