LTC3417 Datasheet, PDF (12/20 Pages) Linear Technology – Dual Synchronous 1.4A/800mA 4MHz Step-Down DC/DC Regulator

LTC3417
APPLICATIO S I FOR ATIO
given to ripple current ratings and long term reliability.
Ceramic capacitors have the lowest ESR and cost but also
have the lowest capacitance density, high voltage and
temperature coefficient and exhibit audible piezoelectric
effects. In addition, the high Q of ceramic capacitors along
with trace inductance can lead to significant ringing. Other
capacitor types include the Panasonic specialty polymer
(SP) capacitors.
In most cases, 0.1µF to 1µF of ceramic capacitors should
also be placed close to the LTC3417 in parallel with the
main capacitors for high frequency decoupling.
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. These are tempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor ESR
generates a loop “zero” at 5kHz to 50kHz that is instrumen-
tal in giving acceptable loop phase margin. Ceramic ca-
pacitors remain capacitive to beyond 300kHz and usually
resonate with their ESL before ESR becomes effective.
Also, ceramic capacitors are prone to temperature effects
which require the designer to check loop stability over the
operating temperature range. To minimize their large
temperature and voltage coefficients, only X5R or X7R
ceramic capacitors should be used. A good selection of
ceramic capacitors is available from Taiyo Yuden, TDK and
Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V_IN pin. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must fulfill a charge storage require-
ment. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough to
support the load. The time required for the feedback loop
to respond is dependent on the compensation compo-
nents and the output capacitor size. Typically, 3 to 4 cycles
are required to respond to a load step, but only in the first
cycle does the output drop linearly. The output droop,
V_DROOP, is usually about 2 to 3 times the linear droop of the
first cycle. Thus, a good place to start is with the output
capacitor size of approximately:
C_OUT
≈
2.5
f_O
∆I_OUT
• V_DROOP
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely re-
quired to supply high frequency bypassing, since the
impedance to the supply is very low. A 10µF ceramic
capacitor is usually enough for these conditions.
Setting the Output Voltage
The LTC3417 develops a 0.8V reference voltage between
the feedback pins, V_FB1 and V_FB2, and the signal ground as
shown in Figure 4. The output voltages are set by two
resistive dividers according to the following formulas:
V_OUT1 ≈ 0.8V^{⎛⎝⎜}1+ _RR21^{⎞⎠⎟}
V_OUT2 ≈ 0.8V^{⎛⎝⎜}1+ _RR34^{⎞⎠⎟}
Keeping the current small (<5µA) in these resistors maxi-
mizes efficiency, but making the current too small may
allow stray capacitance to cause noise problems and
reduce the phase margin of the error amp loop.
To improve the frequency response, a feed-forward ca-
pacitor, C_F, may also be used. Great care should be taken
to route the V_FB node away from noise sources, such as the
inductor or the SW line.
3417fb
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