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LTC3410B_15 Datasheet, PDF (12/16 Pages) Linear Technology – 2.25MHz, 300mA Synchronous Step-Down Regulator in SC70
LTC3410B
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3410B. These items are also illustrated graphically in
Figures 4 and 5. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of COUT and ground.
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the (–) plates of CIN and COUT as close as possible.
5. Keep the switching node, SW, away from the sensitive
VFB node.
–
VOUT
+
COUT
L1
1
RUN
LTC3410B
2
6
GND VFB
3
SW
VIN 4
5
CIN
R2
R1
CFWD
VIN
BOLD LINES INDICATE HIGH CURRENT PATHS
3410B F04a
Figure 4a. LTC3410B Layout Diagram
1
RUN
–
VOUT
+
COUT
L1
LTC3410B-1.875
2
GND
6
VOUT
3 SW
5
VIN 4
CIN
VIN
BOLD LINES INDICATE HIGH CURRENT PATHS 3410B F04b
Figure 4b. LTC3410B-1.875 Layout Diagram
VOUT
VIA TO VIN
PIN 1
L1
LTC3410B
SW
VIA TO GND
R1
R2
CFWD
VIN
VIA TO VOUT
COUT
CIN
GND
Figure 5a. LTC3410B Suggested Layout
3410B F05a
VOUT
VIN
VIA TO VIN
PIN 1
L1
LTC3410B-
1.875
SW
COUT
CIN
3410B F05b
Figure 5b. LTC3410B Fixed Output Voltage
Suggested Layout
3410bfa
12