LTC3410B_15 Datasheet, PDF (10/16 Pages) Linear Technology – 2.25MHz, 300mA Synchronous Step-Down Regulator in SC70

LTC3410B
APPLICATIO S I FOR ATIO
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3410B circuits: V_IN quiescent current and I²R
losses. The V_IN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I²R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 3.
1. The V_IN quiescent current is due to two components:
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from V_IN to ground. The resulting
dQ/dt is the current out of V_IN that is typically larger than
the DC bias current. In continuous mode,
I_GATECHG = f(Q_T + Q_B) where Q_T and Q_B are the
gate charges of the internal top and bottom
switches. Both the DC bias and gate charge
losses are proportional to V_IN and thustheir effectswill
be more pronounced at higher supply voltages.
2. I²R losses are calculated from the resistances of the
internal switches, R_SW, and external inductor R_L. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R_DS(ON) and the duty cycle
(DC) as follows:
R_SW = (R_DS(ON)TOP)(DC) + (R_DS(ON)BOT)(1 – DC)
The R_DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I²R losses, simply add R_SW to
R_L and multiply the result by the square of the average
output current.
Other losses including C_IN and C_OUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
1
0.1
0.01
0.001
0.0001
0.1
V_OUT = 1.2V
V_OUT = 1.8V
V_OUT = 2.5V
1
10
100
LOAD CURRENT (mA)
1000
3410 F03
Figure 3. Power Lost vs Load Current
3410bfa
10