LTC3633A-1_15 Datasheet, PDF (11/30 Pages) Linear Technology – Dual Channel 3A, 20V Monolithic Synchronous Step-Down Regulator

LTC3633A/LTC3633A-1
OPERATION
The LTC3633A is a dual-channel, current mode monolithic
step down regulator capable of providing 3A of output
current from each channel. Its unique controlled on-time
architecture allows extremely low step-down ratios while
maintaining a constant switching frequency. Each channel
is enabled by raising the voltage on the RUN pin above
1.22V nominally.
The LTC3633A has a V_ON sense range of 0.6V to 6V, while
the LTC3633A-1 has a V_ON sense range of 1.5V to 12V.
The following table highlights the difference between the
parts in the LTC3633A family. Consult the LTC3633A-2/
LTC3633A-3 data sheet for more details on specific char-
acteristics of those products.
Table 1. LTC3633A Family Features
PART
NUMBER
OUTPUT
VOLTAGE SV_IN V2P5
SENSE RANGE INPUT OUTPUT
LTC3633A
0.6V to 6V
NO
YES
LTC3633A-1
1.5V to 12V
NO
YES
LTC3633A-2
0.6V to 6V
YES
NO
LTC3633A-3
1.5V to 12V YES
NO
LTC3633 PIN
COMPATIBLE
YES
YES
NO
NO
Main Control Loop
In normal operation, the internal top power MOSFET is
turned on for a fixed interval determined by a fixed one-
shot timer (“ON” signal in Block Diagram). When the top
power MOSFET turns off, the bottom power MOSFET turns
on until the current comparator I_CMP trips, thus restarting
the one shot timer and initiating the next cycle. Inductor
current is measured by sensing the voltage drop across
the SW and PGND nodes of the bottom power MOSFET.
The voltage on the ITH pin sets the comparator threshold
corresponding to inductor valley current. The error ampli-
fier EA adjusts this ITH voltage by comparing an internal
0.6V reference to the feedback signal V_FB derived from the
output voltage. If the load current increases, it causes a
drop in the feedback voltage relative to the internal refer-
ence. The ITH voltage then rises until the average inductor
current matches that of the load current.
The operating frequency is determined by the value of the
RT resistor, which programs the current for the internal
oscillator. An internal phase-locked loop servos the switch-
ing regulator on-time to track the internal oscillator edge
and force a constant switching frequency. A clock signal
can be applied to the MODE/SYNC pin to synchronize the
switching frequency to an external source. The regulator
defaults to forced continuous operation once the clock
signal is applied.
At light load currents, the inductor current can drop to zero
and become negative. In Burst Mode operation, a current
reversal comparator (I_REV) detects the negative inductor
current and shuts off the bottom power MOSFET, result-
ing in discontinuous operation and increased efficiency.
Both power MOSFETs will remain off until the ITH voltage
rises above the zero current level to initiate another cycle.
During this time, the output capacitor supplies the load
current and the part is placed into a low current sleep
mode. Discontinuous mode operation is disabled by tying
the MODE/SYNC pin to ground, which forces continuous
synchronous operation regardless of output load current.
“Power Good” Status Output
The PGOOD open-drain output will be pulled low if the
regulator output exits a ±8% window around the regulation
point. This condition is released once regulation within a
±5% window is achieved. To prevent unwanted PGOOD
glitches during transients or dynamic V_OUT changes, the
LTC3633A PGOOD falling edge includes a filter time of
approximately 40µs.
V_IN Overvoltage Protection
In order to protect the internal power MOSFET devices
against transient voltage spikes, the LTC3633A constantly
monitors each V_IN pin for an overvoltage condition. When
V_IN rises above 22.5V, the regulator suspends operation by
shutting off both power MOSFETs on the corresponding
channel. Once V_IN drops below 21.5V, the regulator imme-
diately resumes normal operation. The regulator executes
its soft-start function when exiting an overvoltage condition.
Out-Of-Phase Operation
Tying the PHMODE pin high sets the SW2 falling edge to
be 180° out of phase with the SW1 falling edge. There is a
significant advantage to running both channels out of phase.
When running the channels in phase, both top-side MOSFETs
are on simultaneously, causing large current pulses to be
drawn from the input capacitor and supply at the same time.
3633a1fb
For more information www.linear.com/LTC3633A
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