LTC3408_15 Datasheet, PDF (11/12 Pages) Linear Technology – 1.5MHz, 600mA Synchronous Step-Down Regulator with Bypass Transistor

LTC3408
APPLICATIO S I FOR ATIO
dissipate (0.531A)² • 0.08Ω = 22.6mW. Thus, T_J = 70°C +
(0.0143 + 0.0425)(43) = 71.1°C.
Reductions in power dissipation occur at higher supply
voltages, where the junction temperature is lower due to
reduced switch resistance (R_DS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V_OUT immediately shifts by an amount
equal to (I_LOAD • ESR), where ESR is the effective series
resistance of C_OUT. I_LOAD also begins to charge or dis-
charge C_OUT, which generates a feedback error signal. The
regulator loop then acts to return V_OUT to its steady state
value. During this recovery time V_OUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. For a detailed explanation of switching control loop
theory, see Application Note 76.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C_OUT, causing a rapid drop in V_OUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • C_LOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
V_IN
C_IN
1
V_OUT
2 VIN
8
V_OUT
V_IN 7
3
GND
4
SW
6
REF
5
RUN
LTC3408
C_OUT
V_OUT
R_REF
DAC
C_REF
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3408. These items are also illustrated graphically in
Figures 5 and 6. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V_IN trace should be kept short, direct and wide.
2. Does the (+) plate of C_IN connect to V_IN as closely as
possible? This capacitor provides the AC drive to the
internal power MOSFETs.
3. Keep the (–) plates of C_IN and C_OUT as close as possible.
Design Example
As a design example, assume the LTC3408 is used in a
single lithium-ion battery-powered cellular phone applica-
tion. The V_IN will be operating from a maximum of 4.2V
down to about 2.7V. The load current requirement is a
maximum of 0.6A but most of the time it will be in standby
mode, requiring only 2mA. Efficiency at both low and high
load currents is important. Output voltage is 2.5V. With
this information we can calculate L using Equation (1),
L
=
1
(f)(∆I_L
)
V_OUT

^1–
V_OUT
V_IN


(2)
TO DAC
R_REF
VIA TO REF
C_IN
VIA TO PIN 7
VIA TO PIN 8
C_OUT
VIA TO PIN 1
V_OUT 1
V_IN 2
GND 3
SW 4
LTC3408
8 V_OUT
7 V_IN
6 REF
5 RUN
VIA TO PIN 2
C_REF
3403 F05
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 5. Layout Diagram
L1
VIA TO V_IN VIA TO GND
3408 F06
Figure 6. Suggested Layout
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3408f
11