LTC3890-2 Datasheet, PDF (10/40 Pages) Linear Technology – 60V Low IQ, Dual, 2-Phase Synchronous Step-Down DC/DC Controller

LTC3890-2
PIN FUNCTIONS
TG1, TG2 (Pin 26, Pin 15): High Current Gate Drives for
Top N-Channel MOSFETs. These are the outputs of float-
ing drivers with a voltage swing equal to INTV_CC – 0.5V
superimposed on the switch node voltage SW.
PGOOD1, PGOOD2 (Pin 27, Pin 14): Open-Drain Logic
Output. PGOOD1,2 is pulled to ground when the voltage
on the V_FB1,2 pin is not within ±10% of its set point.
I_LIM (Pin 28): Current Comparator Sense Voltage Range
Inputs. Tying this pin to SGND, FLOAT or INTV_CC sets the
maximum current sense threshold to one of three different
levels for both comparators.
TRACK/SS1, TRACK/SS2 (Pin 29, Pin 13): External Track-
ing and Soft-Start Input. The LTC3890-2 regulates the
V_FB1,2 voltage to the smaller of 0.8V or the voltage on the
TRACK/SS1,2 pin. An internal 1μA pull-up current source
is connected to this pin. A capacitor to ground at this
pin sets the ramp time to final regulated output voltage.
Alternatively, a resistor divider on another voltage supply
connected to this pin allows the LTC3890-2 output to track
the other supply during start-up.
ITH1, ITH2 (Pin 30, Pin 12): Error Amplifier Outputs and
Switching Regulator Compensation Points. Each associ-
ated channel’s current comparator trip point increases
with this control voltage.
V_FB1, V_FB2 (Pin 31, Pin 11): Receives the remotely sensed
feedback voltage for each controller from an external
resistive divider across the output.
SENSE1⁺, SENSE2⁺ (Pin 32, Pin 10): The (+) input to the
differential current comparators are normally connected
to DCR sensing networks or current sensing resistors.
The ITH pin voltage and controlled offsets between the
SENSE^– and SENSE⁺ pins in conjunction with R_SENSE set
the current trip threshold.
Table 1. Summary of the Differences Between the Parts in the LTC3890 Family
LTC3890
LTC3890-1
I_LIM Pin for Adjustable
Yes
No
Current Sense Voltage?
CLKOUT and PHASMD Pins
Yes
No
for PolyPhase^® Operation?
Independent PGOOD Pins for Yes; PGOOD1 and PGOOD2
Each Channel
No; PGOOD1 Only
Overvoltage Protection
Yes
Yes
Bottom Gate “Crowbar?”
Current Foldback During
Yes
Yes
Overcurrent Events
Light Load Operation When
Synchronized to External
Clock Using PLLIN/MODE Pin
Forced Continuous
Forced Continuous
SENSE Pins Common Mode
Range
Operation with SENSE
Common Mode < 0.5V
Requires V_FB < 0.65V
Operation with SENSE
Common Mode < 0.5V
Requires V_FB < 0.65V
LTC3890-2
Yes
Yes
Yes; PGOOD1 and PGOOD2
No; BG Not Forced On
No
Pulse-Skipping
LTC3890-3
No
No
No; PGOOD1 Only
No; BG Not Forced On
No
Pulse-Skipping
Not Dependent on V_FB
Voltage. Makes It Easy to
Make a Non-synchronous
Boost or SEPIC Converter
with Ground-Referenced
Current Sensing
Not Dependent on V_FB
Voltage. Makes It Easy to
Make a Non-synchronous
Boost or SEPIC Converter
with Ground-Referenced
Current Sensing
38902f
10