LTC3546_15 Datasheet, PDF (10/30 Pages) Linear Technology – Dual Synchronous, 3A/1A or 2A/2A Configurable Step-Down DC/DC Regulator

LTC3546
Pin Functions (UFD/FE)
V_FB1 (Pin 20/Pin 23): Feedback voltage from external
resistive divider from Channel 1 output. Nominal voltage
for this pin is 0.6V.
TRACK/SS1 (Pin 21/Pin 24): Tracking input for Channel 1
output or optional external soft-start input. V_OUT1 will track
an external voltage at this pin. Leaving this pin floating
allows V_OUT1 to start-up using the internal soft-start. An
external soft-start can be programmed by connecting a
capacitor between this pin and ground. External soft-start
ramp time must be greater than the internal soft-start time
of 1.2ms. Refer to the Applications Information section
for more details.
BMC1 (Pin 22/Pin 25): Burst Mode Clamp for Channel 1.
Connecting this pin to an external voltage between 0V and
0.6V sets the Burst Mode clamp level. If this pin is pulled
to V_CCA, an internal Burst Mode clamp level is used. This
pin should be tied to GND when Burst Mode operation is
not selected.
PGOOD1 (Pin 23/Pin 26): Power Good Pin for the 1A
Regulator. This common drain logic output is pulled to
GND when the output voltage of Channel 1 is below –8%
of regulation.
FREQ (Pin 24/Pin 27): Frequency Set Pin. When FREQ is
at V_CCA, the internal oscillator runs at 2.25MHz. When a
resistor is connected from this pin to GNDA, the internal
oscillator frequency can be varied from 0.75MHz to 4MHz.
When using external synchronization this pin compensates
the internal PLL. Typical compensation components are a
200k resistor in series with a 100pF capacitor.
GNDA (Pin 25/Pin 28): Ground Pin for Internal Analog
Circuitry.
V_CCA (Pin 26/Pin 1): Supply Pin for Internal Analog Cir-
cuitry.
SYNC/MODE (Pin 27/Pin 2): Combination Mode Selec-
tion and Oscillator Synchronization Pin. This pin controls
the operation of the device. When the voltage on the
SYNC/MODE pin is > (V_IN – 0.5V), Burst Mode operation
is selected for both regulators. When the voltage on the
SYNC/MODE pin is <0.5V, pulse-skipping mode is selected
for both regulators. When the SYNC/MODE pin is held at
V_IN/2, forced continuous mode is selected for both regula-
tors. The oscillation frequency can be synchronized to an
external oscillator applied to this pin. When synchronized
to an external clock, pulse-skipping mode is selected.
PGOOD2 (Pin 28/Pin 3): Power Good Pin for Channel 2
This common drain logic output is pulled to GND when the
output voltage of Channel 2 is below –8% of regulation.
GNDD (Exposed Pad Pin 29/Exposed Pad Pin 29): Digital
Ground. Connect to Electrical Ground for substrate and
internal digital circuitry. Solder to PCB for rated thermal
performance.
3546fc
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