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| LTC1403-1_12 Datasheet, PDF (10/22 Pages) Linear Technology – Serial 12-Bit/14-Bit, 2.8Msps | |||
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LTC1403-1/LTC1403A-1
TIMING DIAGRAM
LTC1403-1 Timing Diagram
t2
t3
t1
t7
17 18 1
2
34
5
6
7
8
9 10 11 12 13 14 15 16 17 18 1
SCK
t4
t5
CONV
INTERNAL
S/H STATUS
t6
SAMPLE
SDO
t8
Hi-Z
HOLD
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
*BITS MARKED "X" AFTER D0 SHOULD BE IGNORED.
14-BIT DATA WORD
tCONV
tTHROUGHPUT
tACQ
SAMPLE
HOLD
t8
t9
X* X*
Hi-Z
14031 TD01
17 18
SCK
t4
CONV
INTERNAL
S/H STATUS
t6
SAMPLE
SDO
t2
t3
1
2
t8
Hi-Z
LTC1403A-1 Timing Diagram
t1
t7
34
5
6
7
8
9 10 11 12 13 14 15 16 17 18 1
t5
HOLD
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2
14-BIT DATA WORD
tCONV
tTHROUGHPUT
tACQ
SAMPLE
HOLD
t8
t9
D1 D0
Hi-Z
14031 TD01b
Nap Mode and Sleep Mode Waveforms
SLK
t1
t1
CONV
NAP
SLEEP
VREF NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS
t12
14031 TD02
10
SCK to SDO Delay
SCK
t8
t10
SDO
VIH
SCK
VOH
SDO
VOL
VIH
t9
90%
10%
14031 TD03
14031fc
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