LTC3546 Datasheet, PDF (17/28 Pages) Linear Technology – Dual Synchronous, 3A/1A or 2A/2A Confi gurable Step-Down DC/DC Regulator

LTC3546
APPLICATIONS INFORMATION
Input Capacitor (C_IN) Selection
In continuous mode, the input current of the converter can
be approximated by the sum of two square waves with
duty cycles of approximately V_OUT1/V_IN and V_OUT2/V_IN. To
prevent large voltage transients, a low equivalent series
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. Some capacitors have a de-rat-
ing spec for maximum RMS current. If the capacitor being
used has this requirement it is necessary to calculate the
maximum RMS current. The RMS current calculation is
different if the part is used “in phase” or “out of phase”.
For “in phase”, there are two different equations:
V_OUT1 > V_OUT2:
I_RMS =
( ) ( ) ^{2 •I1•I2 •D2(1–D1)+I22 D2 –D22 +I12 D1–D12}
V_OUT2 > V_OUT1:
I_RMS =
( ) ( ) ^{2 •I1•I2 •D1(1–D2)+I22 D2 –D22 +I12 D1–D12}
Where:
D1= ^VOUT1 and D2 = ^VOUT2
V_IN
V_IN
When D1 = D2, then the equation simplifies to:
I_RMS = (I1+I2) D(1– D)
or
( ) _{( ) IRMS = I1+I2}
V_OUT V_IN – V_OUT
V_IN
where the maximum average output currents I1 and
I2 equals the peak current minus half the peak-to-peak
ripple current:
I1=
I_LIM1
–
ΔI_L1
2
I2
= I_LIM2
–
ΔI_L2
2
These formula have a maximum at V_IN = 2V_OUT, where
I_RMS = (I1 + I2)/2. This simple worst case is commonly
used to determine the worst case I_RMS.
For “out of phase”, (PHASE pin is at ground) the ripple
current can be lower than the in-phase.
In the “out of phase” case, the maximum I_RMS does not
occur when V_OUT1 = V_OUT2. The maximum typically oc-
curs when V_OUT1 – V_IN/2 = V_OUT2 and when V_OUT2 – V_IN/2
= V_OUT1. As a good rule of thumb, the amount of worst
case ripple is about 75% of the worst case ripple in the
“in phase” mode. Note, that when V_OUT1 = V_OUT2 = V_IN/2
and I₁ = I₂, the ripple is at its minimum.
Note that capacitor manufacturer’s ripple current ratings
are often based on only 2000 hours lifetime. This makes
it advisable to further derate the capacitor, or choose a
capacitor rated at a higher temperature than required.
Several capacitors may also be paralleled to meet the
size or height requirements of the design. An additional
0.1μF to 1μF ceramic capacitor is also recommended on
V_IN for high frequency decoupling, when not using an all
ceramic capacitor solution.
Output Capacitor (C_OUT1 and C_OUT2) Selection
The selection of C_OUT1 and C_OUT2 is driven by the required
ESR to minimize voltage ripple and load step transients.
Typically, once the ESR requirement is satisfied, the
capacitance is adequate for filtering. The output ripple
(ΔV_OUT) is determined by:
ΔV_OUT
≈
ΔI_L
⎛
⎝⎜ ^ESR
+
8
•
f_O
1
• C_OUT
⎞
⎠⎟
where f_O = operating frequency, C_OUT = output capacitance
and ΔI_L = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ΔI_L increases
with input voltage.
Once the ESR requirements for C_OUT have been met, the
RMS current rating generally far exceeds the I_RIPPLE(P-P)
requirement, except for an all ceramic solution.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirement of the application. Aluminum
3546f
17