LTC3546 Datasheet, PDF (11/28 Pages) Linear Technology – Dual Synchronous, 3A/1A or 2A/2A Confi gurable Step-Down DC/DC Regulator

LTC3546
PIN FUNCTIONS
BMC2 (Pin 1): Burst Mode clamp for Channel 2. Connecting
this pin to an external voltage between 0V and 0.6V sets
the Burst Mode clamp level. If this pin is pulled to V_CCA,
an internal Burst Mode clamp level is used.
TRACK/SS2 (Pin 2): Tracking input for Channel 2 output
or optional external soft-start input. V_OUT2 will “track”
an external voltage at this pin. Leaving this pin floating
allows V_OUT2 to start-up using the internal soft-start. An
external soft-start can be programmed by connecting a
capacitor between this pin and ground. External soft-start
ramp time must be greater than the internal soft-start time
of 1.2ms. Refer to the Applications Information section
for more details.
V_FB2 (Pin 3): Feedback voltage from external resistive
divider from the Channel 2 regulator output. Nominal
voltage for this pin is 0.6V.
I_TH2 (Pin 4): Error amplifier compensation for Channel 2
regulator. Peak current increases with an increase in the
voltage on this pin. Nominal voltage range for this pin is
0V to 1.5V.
V_CCD (Pin 5): Supply pin for internal digital circuitry.
RUN2 (Pin 6): Low Level Logic Input. Enable for Chan-
nel 2. When pulled high, regulator is running. When at 0V,
regulator is off. When both RUN1 and RUN2 are at 0V the
part is in shutdown.
V_IN2 (Pin 7): Supply pin for 2A P-channel switch which
connects from V_IN2 to SW2A/B.
V_IN1 (Pin 8): Supply pin for 1A P-channel switch which
connects from V_IN1 to SW1.
V_IN1D (Pin 9): Supply pin for 1A dependent P-channel
switch which connects from V_IN1D to SW1D.
SW2A (Pin 10): Half of the switch node connection to the
inductor for Channel 2. SW2A and SW2B must be externally
tied together. This pin swings from V_IN2 to PGND2.
SW2B (Pin 11): Half of the switch node connection to the
inductor for Channel 2 SW2A and SW2B must be externally
tied together. This pin swings from V_IN2 to PGND2.
SW1D (Pin 12): The dependent switch node connection.
The pin is externally connected to SW1 for a 2A/2A regula-
tor or to SW2A/B for a 3A/1A regulator. Internal circuitry
detects which pin SW1D is externally connected to, SW1
or SW2A/B. This pin swings from V_IN1D to PGND1D. SW1D
switching will be controlled by the output switch to which
it is connected, i.e. SW1 or SW2A/SW2B. The dependant
1A power stage can be disabled by floating the SW1D pin.
The SW1D pin must never be connected to V_IN or GND.
When disabled, SW1D is pulled high internally.
SW1 (Pin 13): The switch node connection to the Inductor
for the Channel 1 regulator. This pin swings from V_IN1 to
PGND1.
PGND1D (Pin 14): Ground for SW1D switching N-chan-
nel driver.
PGND1 (Pin 15): Ground for SW1 switching N-channel
driver.
PGND2 (Pin 16): Ground for SW2A and SW2B switching
N-channel driver.
RUN1 (Pin 17): Low Level Logic Input. Enable for Chan-
nel 1. When pulled high, regulator is running. When at 0V,
regulator is off. When both RUN1 and RUN2 are at 0V the
part is in shutdown.
PHASE (Pin 18): Low Level Logic Input. Selects Chan-
nel 2 regulator switching phase with respect to Channel 1
regulator switching. When pulled high, the SW1 regulator
and the SW2A/B regulator are in phase. When PHASE is
at 0V the SW1 regulator and the SW2A/B regulator are
switching 180° out-of-phase.
I_TH1 (Pin 19): Error amplifier compensation for Channel 1.
Peak current increases with an increase in the voltage on this
pin. Nominal voltage range for this pin is 0V to 1.5V.
3546f
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