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LTC3546 Datasheet, PDF (12/28 Pages) Linear Technology – Dual Synchronous, 3A/1A or 2A/2A Confi gurable Step-Down DC/DC Regulator
LTC3546
PIN FUNCTIONS
VFB1 (Pin 20): Feedback voltage from external resistive
divider from Channel 1 output. Nominal voltage for this
pin is 0.6V.
TRACK/SS1 (Pin 21): Tracking input for Channel 1 output
or optional external soft-start input. VOUT1 will “track” an
external voltage at this pin. Leaving this pin floating allows
VOUT1 to start-up using the internal soft-start. An external
soft-start can be programmed by connecting a capacitor
between this pin and ground. External soft-start ramp
time must be greater than the internal soft-start time of
1.2ms. Refer to the Applications Information section for
more details.
BMC1 (Pin 22): Burst Mode clamp for Channel 1. Con-
necting this pin to an external voltage between 0V and
0.6V sets the Burst Mode clamp level. If this pin is pulled
to VCCA, an internal Burst Mode clamp level is used.
PGOOD1 (Pin 23): Power good pin for the 1A regulator.
This common drain logic output is pulled to GND when the
output voltage of Channel 1 is below –8% of regulation.
FREQ (Pin 24): Frequency Set Pin. When FREQ is at VCCA,
the internal oscillator runs at 2.25MHz. When a resistor is
connected from this pin to GNDA, the internal oscillator
frequency can be varied from 0.75MHz to 4MHz. When
using external synchronization this pin compensates the
internal PLL. Typical compensation components are a
200k resistor in series with a 100pF capacitor.
GNDA (Pin 25): Ground pin for internal analog circuitry.
VCCA (Pin 26): Supply pin for internal analog circuitry.
SYNC/MODE (Pin 27): Combination Mode Selection and
Oscillator Synchronization Pin. This pin controls the opera-
tion of the device. When the voltage on the SYNC/MODE
pin is > (VIN – 0.5V), Burst Mode operation is selected for
both regulators. When the voltage on the SYNC/MODE pin
is <0.5V, pulse skipping mode is selected for both regula-
tors. When the SYNC/MODE pin is held at VIN/2, forced
continuous mode is selected for both regulators. The
oscillation frequency can be synchronized to an external
oscillator applied to this pin. When synchronized to an
external clock, pulse skip mode is selected.
PGOOD2 (Pin 28): Power good pin for Channel 2 This
common drain logic output is pulled to GND when the
output voltage of Channel 2 is below –8% of regulation.
Exposed Pad (Pin 29): Digital Ground. Connect to Electrical
Ground for substrate and internal digital circuitry. Solder
to PCB for rated thermal performance.
3546f
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