ISPGDX2 Datasheet, PDF (23/72 Pages) Lattice Semiconductor – High Performance Interfacing and Switching

Lattice Semiconductor
ispGDX2 Family Data Sheet
DC Electrical Characteristics
Over Recommended Operating Conditions
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
I_IL, I_IH¹ Input or I/O Low Leakage
0 ≤ V_IN ≤ (V_CCO - 0.2V)
(V_CCO - 0.2V) < V_IN ≤ 3.6V
—
—
10
μA
—
—
30
μA
I_IH³
Input High Leakage Current
3.6V < V_IN ≤ 5.5V and
3.0V ≤ V_CCO ≤ 3.6V
—
—
3
mA
I_PU
I/O Active Pull-up Current
0 ≤ V_IN ≤ 0.7 V_CCO
-30
—
-150
μA
I_PD
I/O Active Pull-down Current
V_IL (MAX) ≤ V_IN ≤ V_IH (MAX)
30
—
150
μA
I_BHLS Bus Hold Low Sustaining Current V_IN = V_IL (MAX)
30
—
—
μA
I_BHHS Bus Hold High Sustaining Current V_IN = 0.7 V_CCO
-30
—
—
μA
I_BHLO Bus Hold Low Overdrive Current 0 ≤ V_IN ≤ V_IH (MAX)
—
—
150
μA
I_BHLH Bus Hold High Overdrive Current 0 ≤ V_IN ≤ V_IH (MAX)
—
—
-150
μA
V_BHT Bus Hold Trip Points
V_CCO * 0.35
—
V_CCO * 0.65 V
C₁
I/O Capacitance²
V_CCO = 3.3V, 2.5V, 1.8V
—
—
8
pf
V_CC = 1.8V, V_IO = 0 to V_IH (MAX)
—
—
C₂
Clock Capacitance²
V_CCO = 3.3V, 2.5V, 1.8V
—
—
6
pf
V_CC = 1.8V, V_IO = 0 to V_IH (MAX)
—
—
C₃
Global Input Capacitance²
V_CCO = 3.3V, 2.5V, 1.8V
—
V_CC = 1.8V, V_IO = 0 to V_IH (MAX)
—
6
—
pf
—
1. Input or I/O leakage current is measured with the pin configured as an input or as an I/O with the output driver tri-stated. It is not
measured with the output driver active. Bus maintenance circuits are disabled.
2. T_A = 25°C, f = 1.0MHz.
3. 5V tolerant inputs and I/Os should be placed in banks where 3.0V ≤ V_CCO ≤ 3.6V. The JTAG ports are not included for the 5V tolerant inter-
face.
Supply Current
Over Recommended Operating Conditions (ispGDX2-256)⁴
Symbol
Description
Power Pins Vcc (V)
Min.
Typ.
Max.
3.3
—
59.6
—
Core Logic Power Supply Current
2.5
—
58.7
—
I_CC^1,2
V_CC
GPLL/sysHSI Logic Power Supply
Current
1.8
—
60.0
—
3.3
—
118.7
—
2.5
—
118.7
—
1.8
—
117.5
—
I_CCP²
GPLL/sysHSI CSPLL Power
Supply Current
3.3
—
14.7
—
V_CCP
2.5
—
14.7
—
1.8
—
17.4
—
3.3
—
35
—
I_CCO³
Bank Power Supply Current
V_CCO
2.5
—
35
—
1.8
—
25
—
3.3
—
1.5
—
I_CCJ
JTAG Programming Current
V_CCJ
2.5
—
1.0
—
1.8
—
800
—
1. 64-input switching frequency at 20 MHz, with one GRP fanout.
2. One GPLL with f_VCO = 400 MHz and one sysHSI Block (two receivers and two transmitters) at 622 MHz data rate.
3. All 8-bank reference circuit currents, all I/Os in tristate, inputs held at valid logic levels, and bus maintenance circuits disabled.
4. T_A = 25°C
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
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