1024EA Datasheet, PDF (12/13 Pages) Lattice Semiconductor – In-System Programmable High Density PLD

Pin Configurations
ispLSI 1024EA 100-Pin TQFP Pinout Diagram
Specifications ispLSI 1024EA
2_NC
1
2_NC
2
I/O 43
3
I/O 44
4
I/O 45
5
I/O 46
6
I/O 47
7
1_{GOE 1/IN 5}
8
Y0
9
VCC
10
VCC
11
2_NC
12
2_NC
13
GND
14
GND
15
VCCIO
16
RESET
17
TDI
18
I/O 0
19
I/O 1
20
I/O 2
21
I/O 3
22
I/O 4
23
2_NC
24
2_NC
25
ispLSI 1024EA
Top View
75
NC²
74
NC²
73
I/O 28
72
I/O 27
71
I/O 26
70
I/O 25
69
I/O 24
68
TMS
67
Y1
66
VCC
65
VCC
64
NC²
63
NC²
62
GND
61
GND
60
Y2
59
Y3
58
TCK
57
I/O 23
56
I/O 22
55
I/O 21
54
I/O 20
53
I/O 19
52
NC²
51
NC²
1. Pins have dual function capability which is software selectable.
2. NC pins are not to be connected to any active signal, VCC or GND.
100-TQFP/1024EA
12