1024EA Datasheet, PDF (11/13 Pages) Lattice Semiconductor – In-System Programmable High Density PLD

Specifications ispLSI 1024EA
Pin Description
NAME
I/O 0 - I/O 3
I/O 4 - I/O 7
I/O 8 - I/O 11
I/O 12 - I/O 15
I/O 16 - I/O 19
I/O 20 - I/O 23
I/O 24 - I/O 27
I/O 28 - I/O 31
I/O 32 - I/O 35
I/O 36 - I/O 39
I/O 40 - I/O 43
I/O 44 - I/O 47
GOE 0/IN 4¹
GOE 1/IN 5¹
TQFP PIN
NUMBERS
19, 20, 21, 22,
23, 28, 29, 30,
31, 32, 33, 34,
42, 43, 44, 45,
46, 47, 48, 53,
54, 55, 56, 57,
69, 70, 71, 72,
73, 78, 79, 80,
81, 82, 83, 84,
92, 93, 94, 95,
96, 97, 98, 3,
4, 5, 6, 7
DESCRIPTION
Input/Output Pins - These are the general purpose I/O pins used by the logic array.
91
This is a dual function pin. It can be used either as Global Output Enable for all I/O cells or it can be
used as a dedicated input pin.
8
This is a dual function pin. It can be used either as Global Output Enable for all I/O cells or it can be
used as a dedicated input pin.
TDI
18
TMS
68
TDO
35
TCK
58
Input - Functions as an input pin to load programming data into the device and also used as one of
the two control pins for the ispJTAG state machine.
Input - Controls the operation of the ISP state machine.
Output - Functions as an output pin to read serial shift register data.
Input - Functions as a clock pin for the Serial Shift Register.
RESET
17
Y0
9
Y1
67
Active Low (0) Reset pin which resets all of the GLB and I/O registers in the device.
Dedicated Clock input. This clock input is connected to one of the clock inputs of all of the GLBs on
the device.
Dedicated Clock input. This clock input is brought into the clock distribution network, and can
optionally be routed to any GLB on the device.
Y2
60
Dedicated Clock input. This clock input is brought into the clock distribution network, and can
optionally be routed to any GLB and/or any I/O cell on the device.
Y3
59
Dedicated Clock input. This clock input is brought into the clock distribution network, and can
optionally be routed to any I/O cell on the device.
GND
VCC
14, 15, 36, 37, Ground (GND)
61, 62, 89, 90
10, 11, 40, 41, Vcc
65, 66, 85, 86
VCCIO
NC²
16
Supply voltage for output drivers, 5V or 3.3V.
1, 2, 12, 13, No Connect
24, 25, 26, 27,
38, 39, 49, 50,
51, 52, 63, 64,
74, 75, 76, 77,
87, 88, 99, 100
1. Pins have dual function capability which is software selectable.
2. NC pins are not to be connected to any active signals, Vcc or GND.
Table 2-0002A/1024EA
11