2064E Datasheet, PDF (10/11 Pages) Lattice Semiconductor – In-System Programmable SuperFAST™ High Density PLD

Pin Configuration
ispLSI 2064E 100-Pin TQFP Pinout Diagram
Specifications ispLSI 2064E
VCCIO
1
GND
2
I/O 57
3
I/O 58
4
I/O 59
5
I/O 60
6
I/O 61
7
I/O 62
8
I/O 63
9
1_NC
10
Y0
11
VCC
12
GND
13
BSCAN
14
RESET
15
2_{TDI/IN 0}
16
I/O 0
17
I/O 1
18
I/O 2
19
I/O 3
20
I/O 4
21
I/O 5
22
I/O 6
23
VCCIO
24
GND
25
ispLSI 2064E
Top View
75
VCCIO
74
GND
73
I/O 38
72
I/O 37
71
I/O 36
70
I/O 35
69
I/O 34
68
I/O 33
67
I/O 32
66
GOE 0
65
Y1
64
VCC
63
GND
62
Y2
61
NC¹
60
TCK/IN 3²
59
I/O 31
58
I/O 30
57
I/O 29
56
I/O 28
55
I/O 27
54
I/O 26
53
I/O 25
52
VCCIO
51
GND
1. NC pins are not to be connected to any active signals, VCC or GND.
2. Pins have dual function capability.
0766A-2064E
10