U4305B Datasheet, PDF (4/20 Pages) Keysight Technologies – Protocol Exerciser for PCI Express® 3.0

04 | Keysight | U4305B Protocol Exerciser for PCI Express^® 3.0 - Data Sheet
U4305B-EX3 PCIe Gen3 Exerciser
The U4305B PCIe 3.0 exerciser provides the following:
–– Standard features
–– Emulate root complex or add-in-card
–– Equalization and transceiver control
–– Configuration space register emulation
–– Emulates three device functions
–– Traffic generation
–– Data replay of data captured on U4301A/B PCIe analyzer
–– Error simulation (CRC errors, bit errors, poison TLP, etc.)
–– Protocol exerciser GUI provides a graphical control of the U4305B exerciser card
–– API program control can be done through TCL, Python, C++, or C#
–– Optional features
–– Support up to five functions
–– ECRC support
–– Provides emulation of MR-IOV capable component
–– Provides emulation of SR-IOV capable components
–– NVMe emulation of root complex (includes conformance tests)
–– NVMe emulation of end point
The built-in “Test Bench” allows user generation on automated testing of PCIe or NVMe
operations. The Test Bench comes with scripts that validate the operation from ASPM or
PCI-PM L1 substates. These pre-written tests exercise each state 1000 times and provide
pass/fail results that report on the control register operation as well as operation of each
L1 substate entry/recovery.
Additional testing can be created that utilizes any DCOM-capable language such as TCL,
Python, C++, or C# to execute test and generate reports. The exerciser even has API
logging that allows the user to create an automated test structure by using the interface.
The built in “Test Bench” allows user generation on automated testing of PCIe or NVMe
operations. Users can utilize any DCOM-capable language such as TCL, Python, C++, or
C# to execute test and generate reports.
Data captured by the U4301B PCIe analyzer can be replayed by the exerciser to emulate
your device. Simple export, edit and replay tools make the process easy.
U4301B PCIe analyzer
capture trace
Data link layer test features
–– Receive a packet as having an LCRC
error and NAK in the packet to
stimulate DUT response mechanism.
Can repeat this for N (N is program-
mable) for a programmable sequence
number causing DUT to replay
multiple times and link retraining
–– Can offset Sequence number of
transmitted packet for sequence
number testing of the DUT
–– Can send TLPs with LCRC and/or
disparity errors
–– Programmable replay timer value
Transaction layer test features
–– Can generate 32 bit or 64 bit memory
transactions, Configuration Cycles,
I/O Cycles, and message requests
–– Generate correct or incorrect ECRC
and check the same at the receiver
–– Generate malformed TLP by making
field inconsistent with actual payload
length
–– Generate poisoned TLP and nullified
TLP
–– Delay or discard erroneous comple-
tion notification to force completion
notification
–– Supports Data Compare to check
integrity of the payload
Exerciser protocol checker
The U4305B PCIe Gen3 Exerciser
provides an internal protocol check that
reports various protocol errors that
the DUT may have made and has been
detected at the Exerciser’s receiver. An
external trigger can be generated on
these events to enable trace tools to
capture the details of the error condition.
Figure 2.
U4305B PCIe exerciser
traffic generation