81100 Datasheet, PDF (4/13 Pages) Keysight Technologies – Pulse Pattern Generators

Level/Pulse Performance Characteristics
Level specifications are valid after a 30 ns typical settling time.
Amplitude
Level window
Accuracy
Resolution
Output connectors
50 Ω into 50 Ω
1 kΩ into 50 Ω
50 Ω into 50 Ω
1 kΩ into 50 Ω
50 Ω into 50 Ω
1 kΩ into 50 Ω
50 Ω into 50 Ω
1 kΩ into 50 Ω
Agilent 81101A
100 mVpp to 10.0 Vpp
200 mVpp to 20.0 Vpp
-10.0 V to +10.0 V
-20.0 V to +20.0 V
± (3% + 75 mV)
± (3% + 150 mV) ¹
10 mV
20 mV
BNC single-ended
Source impedance
Accuracy
Max. external voltage
Short circuit current
Base line noise
Overshoot/preshoot/
ringing
Selectable 50 Ω or 1 kΩ
Typ. ± 1%
± 24 V
± 400 mA max.
10 mV RMS typ.
± 5% of amplitude ± 20 mV
Load compensation: The actual load
value can be entered (for loads ≠ 50 Ω)
to display actual output values.
On/off: Relays connect/disconnect
output (HiZ).
Normal/complement: Selectable.
Limit: Programmable high and low levels
can be limited to protect the device-
under-test.
Input impedance: 50 Ω/10 kΩ
selectable.
Threshold: -10 V to +10 V.
Max. input voltage: ±15 Vpp.
Sensitivity: 300 mVpp typical.
1. In ±19 V level window
Trigger modes
Inputs and outputs
Continuous: Continuous pulses, double
pulses or bursts (single or double pulses).
External triggered: Each active input
transition (rising, falling or both) generates
a single or double pulse or burst.
External gated: The active input level (high
or low) enables pulses, double pulses or
bursts. The last single/double pulse or
burst is always completed.
Clock input/PLL reference and external
input: One input (BNC connector at rear
panel) is used for clock input or alterna-
tively for the PLL.
PLL reference: The internal PLL is locked
to an external 5 MHz or 10 MHz reference
frequency.
Clock input: The output period is
determined by the signal at CLK input.
External width: The pulse shape can be
recovered whilst the period and width of
an external input signal are maintained.
Levels and transitions can be set.
Manual: Simulates an external input
signal.
Ext. input: Used for trigger, gate or
external width.
Level parameters: Can be entered as volt-
age or current, as high and low level, or as
offset and amplitude.
Input transitions: < 100 ns.
Frequency: Dc to 50 MHz.
Minimum pulse width: 10 ns
Strobe output and trigger output trigger
format: One pulse per period with 50%
duty cycle typical.
External mode: 9 ns typ.
Level: TTL or ECL selectable.
Output impedance: 50 Ω typical.
Max. external voltage: -2 V/+7 V.
Transition times: 1.0 ns typical for TTL,
600 ps typical for ECL.
Internal triggered: Internal PLL replaces
an external trigger source.
Typical delay times Agilent 81101A
Instrument mode From
External width
Ext. input
All other modes
Ext. input/clk input
Strobe/trigger out
To
Strobe/trigger out
Output 1/output 2
Strobe/trigger out
Output 1/output 2
Output 1/output 2
Typ. value
8.5 ns
22.5 ns
12.0 ns
29 ns
17 ns
4
Data Sheet 81100 Family of Pulse Pattern Generators