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U4301B Datasheet, PDF (2/19 Pages) Keysight Technologies – PCI Express 3.0 Analyzer Module
Introduction
The Keysight Technologies, Inc. high speed U4301B PCI Express 3.0
analyzer module is a protocol analyzer supporting all PCI Express®
applications from Gen1 through Gen3, at speeds, including 2.5 GT/s
(Gen1) and 5.0 GT/s (Gen2) through PCIe 8 GT/s (Gen3), and with link
widths from x1 to x16. The U4301B analyzer captures and decodes
PCI Express data and displays it in a packet viewer window.
The U4301B analyzer is a blade that installs into an AXIe two-slot
M9502A or five-slot M9505A.
Probing is provided by the U4321A solid-slot interposer probe,
U4324A flying lead solder down probe, or the U4322A mid-bus
probe based on Keysight’s equalization snoop probe (ESP)
technology.
Gain insight into the equalization process and all of the state
transitions with views that can be customized to meet your
requirements. The analyzer ’s LTSSM overview can pinpoint specific
training sequence issues through easy-to-interpret analysis results.
Keysight’s transactional decoder includes a transactional viewer
that allows the designer to select transactional queues and
performance information from the analyzer’s NVMe transaction
overview pane. This organizes the transactions by direction or by
queue to follow the data flow across the interface, with one-click
control. Individual PRP (Physical Region Page) lists contain all of the
key information of the NVMe queues, allowing designers to quickly
review and validate the data flows over the PCIe connections.
The performance analysis package includes the real data
throughput calculations, with response-time measurement of the
PCIe data flow. It allows designers to measure and understand
throughput performance, PCIe response times, and other
operational measurements that provide the insight needed to
optimize device performance.
Complementary PCIe stimulus and response testing of the PCIe
system is accomplished with the addition of the U4305B PCIe Gen3
exerciser.
Keysight solutions for
PCIe Gen1 to Gen3
analysis and emulation
–– PCIe Gen1 (2.5 GT/s),
Gen2 (5 GT/s), and Gen3
(8 GT/s) support
–– Auto link configuration for
up to x16 link width (auto
speed, auto link width,
auto link reversal, auto
polarity)
–– LTSSM analysis with
equalization reporting
–– Power state analysis
includes L1 substate
operation
–– Flow control credit and
performance analysis
–– PCIe, NVMe, AHCI, and
configuration space
decoding and analysis
–– Compact AXIe modular
system configuration