N1076A Datasheet, PDF (2/19 Pages) Keysight Technologies – Electrical and Optical Clock Data Recovery Solutions

02 | Keysight | Electrical and Optical Clock Data Recovery Solutions - Data Sheet
Electrical and Optical Clock Recovery Solutions
Keysight clock recovery solutions offer a wide data rate range from 50 MBaud to 32 GBaud,
and are ideal for many transmitter and receiver test setups for computers, datacom, and
communication standards.
The Keysight Technologies, Inc. N1076A electrical clock recovery provides clock recovery
capabilities for electrical non-return-to-zero (NRZ) and pulse amplitude modulation 4-level
(PAM4) signals.
The Keysight Technologies, Inc. N1077A optical/electrical clock recovery integrates electrical
clock recovery with an amplified optical-to-electrical (O/E) converter, enabling it to work for
both electrical and optical applications. The N1077A optionally provides internal single-mode
(SM) and multimode (MM) splitters, which simplifies setup and improves ease-of-use.
N1076A and N1077A models include adjustable loop bandwidth and selectable peaking, and
provide high sensitivity and low intrinsic jitter performance that ensures optimal measurement
accuracy. The optional jitter spectrum analysis (JSA) capability provides insight into the
magnitude and distribution of low-frequency jitter, which is helpful in troubleshooting root
cause for excessive jitter.
PLL and Jitter Spectrum Analysis
Use Keysight Technologies, Inc. 86100DU-400 PLL analysis software to make fast, accurate,
and repeatable measurements of phase-locked loop (PLL) bandwidth/jitter transfer. The
N1076A/77A can be configured as a jitter receiver, which can be combined with a precision
jitter source, such as the Keysight Technologies M8000 Series of BER test solutions, to create
a PLL stimulus-response test system. PCI Express^®-approved PLL bandwidth compliance tests
are pre-configured, with automatic report generation.
10
5
0
–5
–10
–15
–20
–25
–30
–35
–40
100E+3
Jitter transfer function
1E+6
10E+6
Frequency (Hz)
100E+6
Figure 1. The N1076A/77A clock recovery may be configured as a jitter receiver when characterizing
phase-locked loop (PLL) designs using 86100DU-400 PLL analysis software.