81160A Datasheet, PDF (12/36 Pages) Keysight Technologies – Pulse Function Arbitrary Noise Generators

12 | Keysight | 81150A and 81160A Pulse Function Arbitrary Noise Generators – Data Sheet
Emulate effects like...
–– Capacitive load of the channel
–– Asymmetric delay
–– Crossing point deviations
–– Duty cycle distortions
–– Arbitrary transition times
–– Level noise
–– Delays from/to electrical idle
...By defining the transitions so that the
previous bit influences the current bit
Stress your device to its limits – define your own bit shape
NRZ
Mode
NRZ mode with minimum
transition times
NRZ mode with transition
time = 1/3 period
Data pattern: 01001101
Transition
time
Max voltage level
Min voltage level
Period
Arbitrary NRZ mode with minimum
transition times
Bit shape Bit shape waveforms
(user defined)
0→0
0→1 ^1→0 1→1
Mode
Output waveform
Max voltage level
Min voltage level
Max voltage level
Min voltage level
PRBS
Sequencer
2-, 3- and 4-level signals
Bit and block trigger mode
Pass through pattern for
combined physical and
protocol test up to 10 Mbit/s
The 81150A and the 81160A pattern generators let you define the transitions from one
bit to the other so that the previous bit influences the current bit. The user can set up
own defined arbitrary bit shapes.
In addition to user-defined patterns, standard patterns like PRBS up to 231 are available.
The sequencer allows setting up a pre-amble sequence so that the device under test
moves into test mode.
Additionally to 2-level signals, it is also possible to create 3- and even 4-level signals.
With the 3-level signals, it is no longer necessary to add different signals for electrical
idle. 3-level signals are important e.g. for use in Ethernet environment and 4-level
signals e.g. for PAM-4 applications.
Besides, standard trigger modes like continuous bit and block trigger modes allow
adoptions to application needs. In the bit mode you see that on every trigger, the
sequence is advanced by one bit. An application example is a bit clock, which can be
fed into an external clock and then into the trigger input.
In the block mode the entire data block is generated once per trigger event. This is
interesting for example in applications with protocol data.
The 81150A and the 81160A pattern generators pass the data through to the device
under test and add any kind of stress (shape and timing change).
Bridge the gap between protocol and physical layer test – in real time up to 10 Mbit/s
Increase your test efficiency by combining physical layer test with protocol test
Protocol
exerciser
MOD
IN
81150A/81160A
pass through
pattern
Sends out protocol
data; e.g. VPT 1000
for FlexRay
Real-time data
pass through with
flexible modulation
and re-stress test
DUT
Pass/fail test
Protocol handshake
The pass-through pattern functionality takes the protocol data via Mod In and
adds any kind of stress (shape and timing changes).