CPC7593 Datasheet, PDF (19/24 Pages) Clare, Inc. – Line Card Access Switch

INTEGRATED CIRCUITS DIVISION
CPC7593
2.3.8 Alternate Break-Before-Make Operation Logic Table (Ringing to Talk Transition)
State IN_RINGING IN_TESTin IN_TESTout Latch
Ringing 1
0
0
0
All-off
1
0
1
X
Break-
Before- 0
0
0
Make
Talk
0
0
0
0
T_SD
Timing
Break
Switches
Ringing
Return
Switch
(SW3)
Ringing
Switch
(SW4)
Test
Switches
Z
-
Off
On
On
Off
Hold this state for at least
one-half of ringing cycle.
SW4 waiting for zero current
Off
Off
On
Off
0
to turn off.
Zero current has occurred.
SW4 has opened
Off
Off
Off
Off
Z
Break switches close.
On
Off
Off
Off
2.4 Data Latch
The CPC7593 has an integrated transparent data
latch. The latch enable operation is controlled by TTL
logic input levels at the LATCH pin. Data input to the
latch are via the input pins, while the output of the data
latch are internal nodes used for state control. When
the LATCH enable control pin is at logic 0 the data
latch is transparent and the input data control signals
flow directly through the latch to the state control
circuitry. A change in input will be reflected by a
change in switch state. Whenever the LATCH enable
control pin is at logic 1, the latch is active and data is
locked. Subsequent input changes will not result in a
change to the control logic or affect the existing switch
state.
Switches will remain in the state they were in when the
LATCH pin changes from logic 0 to logic 1 and will not
respond to changes in input as long as the latch is at
logic 1. However, neither the T_SD input nor the T_SD
output control functions are affected by the latch
function. Internal thermal shutdown control and
external “All-off” control via T_SD is not affected by the
state of the LATCH enable input.
2.5 T_SD Pin Description
The T_SD pin is a bi-directional I/O structure with an
internal pull up sourced from V_DD. As an output, this
pin indicates the status of the thermal shutdown
circuitry. Typically, during normal operation, this pin will
be pulled up to V_DD but under fault conditions that
create excess thermal loading the CPC7593 will enter
thermal shutdown and a logic low will be output.
As an input, the T_SD pin can be utilized to place the
CPC7593 into the “All-Off” state by simply pulling the
input low via an open-collector type buffer. Using a
standard output with an active logic high drive
capability will sink the pull-up current resulting in
unnecessary power consumption.
Use of a standard output buffer with an active high
drive capability will not disable the thermal shutdown
mechanism. The ability to enter thermal shutdown
during a fault condition is independent of the
connection at the T_SD input.
The CPC7593’s internal pull up has a nominal value of
16A.
2.6 Ringing Switch Zero-Cross Current Turn Off
After the application of a logic input to turn SW4 off,
the ringing switch is designed to delay the change in
state until the next zero-crossing. Once on, the switch
requires a zero-current cross to turn off, and therefore
should not be used to switch a pure DC signal. The
switch will remain in the on state no matter the logic
input until the next zero crossing. These switching
characteristics will reduce and possibly eliminate
overall system impulse noise normally associated with
ringing switches. See application note AN-144, Impulse
Noise Benefits of Line Card Access Switches for more
information. The attributes of ringing switch SW4 may
make it possible to eliminate the need for a zero-cross
switching scheme. A minimum impedance of 300 in
series with the ringing generator is recommended.
R05
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