CPC7593 Datasheet, PDF (1/24 Pages) Clare, Inc. – Line Card Access Switch

INTEGRATED CIRCUITS DIVISION
CPC7593
Line Card Access Switch
Features
• TTL Logic Level Inputs for 3.3V Logic Interfaces
• Smart Logic for Power Up / Hot Plug State Control
• Improved Switch dV/dt Immunity of 500 V/s
• Small 20-pin or 28-pin SOIC Packages
• Monolithic IC Reliability
• Low, Matched, R_ON
• Eliminates the Need for Zero-cross Switching
• Flexible Switch Timing for Transition from Ringing
Mode to Talk Mode.
• Clean, Bounce-Free Switching
• SLIC Tertiary Protection Via Integrated Current
Limiting, Voltage Clamping, and Thermal Shutdown
• 5V Operation with Power Consumption < 10.5 mW
• Intelligent Battery Monitor
• Logic-Level Inputs, no External Drive Circuitry
Required
Applications
• Standard voice linecards
• Integrated Voice and Data (IVD) linecards
• Central office (CO)
• Digital Loop Carrier (DLC)
• PBX Systems
• Digitally Added Main Line (DAML)
• Hybrid Fiber Coax (HFC)
• Fiber in the Loop (FITL)
• Pair Gain System
• Channel Banks
Description
The CPC7593 is a member of IXYS Integrated
Circuits Division’s next generation Line Card Access
Switch (LCAS) family. This monolithic 10-pole line
card access switch is available in 20-pin and 28-pin
SOIC packages. It provides the necessary functions to
replace three 2-Form-C electromechanical relays on
analog line cards or combined voice and data line
cards found in central office, access, and PBX
equipment. The device contains solid state switches
for tip and ring line break, ringing injection, and test
access. The CPC7593 requires only a +5 V supply
and provides stable start up conditioning during
system power up and for hot plug insertion
applications. Once active, the inputs respond to
traditional TTL logic levels enabling the CPC7593 to
be used with 3.3V only logic.
Ordering Information
CPC7593 part numbers are specified as shown here:
B - 28-pin SOIC delivered 29/Tube, 1000/Reel
Z - 20-pin SOIC delivered 40/Tube, 1000/Reel
CPC7593 x x xx
TR - Add for Tape & Reel Version
A - With Protection SCR
B - Without Protection SCR
C - With Protection SCR and with Extra Logic State
Pb
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Figure 1. CPC7593 Block Diagram
T (T ) _TESTin
CHANTEST
Tip
Ring
T (T ) _TESTout
DROPTEST
T 7 _LINE
Secondary
Protection
R_LINE 22
10
8 TRINGING
SW7
X
X ^SW5 X ^SW3
X
SW1
5
X SW9
SW2
X
X SW6 XSW4
X SW10
X
SW8
CPC7593
SCR
Trip
Circuit
+5 Vdc
12 V_DD
6 T_BAT
SLIC
23 R_BAT
17
V_REF
Switch
Control
L
A
T
16
15
Logic
C
H
18
IN_TESTin
IN_RINGING
IN_TESTout
LATCH
R (R ) _TESTout
DROPTEST
R (R ) _{TESTin CHANTEST}
19
20 R_RINGING
24
1
28 14 13
300Ω (min.)
F_GND
D_GND
T_SD
V_BAT
V_BAT
RINGING
NOTE 1: Pin assignments are for the 28 pin package.
NOTE 2: Block diagram shown with the optional protection SCR.
DS-CPC7593-R05
www.ixysic.com
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