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CPC7594 Datasheet, PDF (17/20 Pages) Clare, Inc. – Line Card Access Switch
INTEGRATED CIRCUITS DIVISION
2.8 Battery Voltage Monitor
The CPC7594 also uses the VBAT voltage to monitor
battery voltage. If system battery voltage is lost, the
CPC7594 immediately enters the all-off state. It
remains in this state until the battery voltage is
restored. The device also enters the all-off state if the
battery voltage rises more positive than about –10 V
with respect to ground and remains in the all-off state
until the battery voltage drops below approximately
–15 V with respect to ground. This battery monitor
feature draws a small current from the battery (less
than 1 A typical) and will add slightly to the device’s
overall power dissipation.
This monitor function performs properly if the
CPC7594 and SLIC share a common battery supply
origin. Otherwise, if battery is lost to the CPC7594 but
not to the SLIC, then the VBAT pin will be internally
biased by the potential applied at the TBAT or RBAT
pins via the internal protection circuitry SCR trigger
current path.
2.9 Protection
2.9.1 Diode Bridge/SCR
The CPC7594 uses a combination of current limited
break switches, a diode bridge/SCR clamping circuit,
and a thermal shutdown mechanism to protect the
SLIC device or other associated circuitry from damage
during line transient events such as lightning. During a
positive transient condition, the fault current is
conducted through the diode bridge to ground via
FGND. Voltage is clamped to a diode drop above
ground. During a negative transient of 2 to 4 V more
negative than the voltage source at VBAT, the SCR
conducts and faults are shunted to FGND via the SCR
or the diode bridge.
In order for the SCR to crowbar (or foldback), the
SCR’s on-voltage (see “Protection Circuitry Electrical
Specifications” on page 10) must be less than the
applied voltage at the VBAT pin. If the VBAT voltage is
less negative than the SCR on-voltage or if the VBAT
supply is unable to source the trigger current, the SCR
will not crowbar.
CPC7594
For power induction or power-cross fault conditions,
the positive cycle of the transient is clamped to a diode
drop above ground and the fault current directed to
ground. The negative cycle of the transient will cause
the SCR to conduct when the voltage exceeds the
VBAT reference voltage by two to four volts, steering
the fault current to ground.
Note: The CPC7594xB does not contain the
protection SCR but instead uses diodes to clamp both
polarities of a transient fault. These diodes direct the
negative potential’s fault current to the VBAT pin.
2.9.2 Current Limiting function
If a lightning strike transient occurs when the device is
in the talk state, the current is passed along the line to
the integrated protection circuitry and restricted by the
dynamic current limit response of the active switches.
During the talk state, when a 1000V 10x1000 s
lightning pulse (GR-1089-CORE) is applied to the line
though a properly clamped external protector, the
current seen at TLINE and RLINE will be a pulse with a
typical magnitude of 2.5 A and a duration less than
0.5 s.
If a power-cross fault occurs with the device in the talk
state, the current is passed though break switches
SW1 and SW2 on to the integrated protection circuit
but is limited by the dynamic DC current limit response
of the two break switches. The DC current limit
specified over temperature is between 80 mA and
425 mA and the circuitry has a negative temperature
coefficient. As a result, if the device is subjected to
extended heating due to a power cross fault condition,
the measured current at TLINE and RLINE will decrease
as the device temperature increases. If the device
temperature rises sufficiently, the temperature
shutdown mechanism will activate and the device will
enter the all-off state.
2.10 Thermal Shutdown
The thermal shutdown mechanism activates when the
device die temperature reaches a minimum of 110 C,
placing the device in the all-off state regardless of
logic input. During thermal shutdown events the TSD
pin will output a logic low with a nominal 0 V level. A
logic high is output from the TSD pin during normal
operation with a typical output level equal to VDD.
R04
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